TDGL007 Microchip Technology, TDGL007 Datasheet - Page 353

• Manufacturer Part Number: TDGL007
• Description: Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
• Manufacturer: Microchip Technology

Specifications of TDGL007

• Product: Development Boards
• Interface Type: CAN, I2C
• Operating Supply Voltage: 5 V

INDEX
A
A/D Converter ................................................................... 245
AC Characteristics .................................................... 287, 330
ADC Module
Alternate Vector Interrupt Table (AIVT) .............................. 87
Arithmetic Logic Unit (ALU)................................................. 31
Assembler
B
Barrel Shifter ....................................................................... 35
Bit-Reversed Addressing .................................................... 68
Block Diagrams
Brown-out Reset (BOR) .................................................... 262
C
C Compilers
Clock Switching................................................................. 153
Code Examples
© 2011 Microchip Technology Inc.
DMA .......................................................................... 245
Initialization ............................................................... 245
Key Features............................................................. 245
ADC Module.............................................................. 333
ADC Module (10-bit Mode) ....................................... 333
ADC Module (12-bit Mode) ....................................... 333
Internal RC Accuracy ................................................ 289
Load Conditions ................................................ 287, 330
ADC1 Register Map .................................................... 54
ADC2 Register Map .................................................... 54
MPASM Assembler................................................... 274
Example ...................................................................... 69
Implementation ........................................................... 68
Sequence Table (16-Entry)......................................... 69
16-Bit Timer1 Module................................................ 165
A/D Module ............................................................... 246
Connections for On-Chip Voltage Regulator............. 262
Device Clock (Oscillator)........................................... 145
Device Clock (PLL) ................................................... 147
DSP Engine ................................................................ 32
dsPIC33F .................................................................... 16
dsPIC33F CPU Core................................................... 26
ECAN Technology .................................................... 218
I
Input Capture ............................................................ 173
Output Compare ....................................................... 175
Programmer’s Model................................................... 27
PWM Module ............................................................ 180
Quadrature Encoder Interface .................................. 193
Reset System.............................................................. 81
Shared Port Structure ............................................... 163
SPI Module ............................................................... 197
Timer2 (16-Bit) .......................................................... 169
Timer2/3 (32-Bit) ....................................................... 168
Top Level System Architecture Using Dedicated
UART Module ........................................................... 211
Watchdog Timer (WDT) ............................................ 263
MPLAB C18 .............................................................. 274
Enabling .................................................................... 153
Sequence.................................................................. 153
Erasing a Program Memory Page............................... 78
Initiating a Programming Sequence............................ 79
Loading Write Buffers ................................................. 79
Port Write/Read ........................................................ 164
PWRSAV Instruction Syntax..................................... 155
2
C Module ................................................................ 204
Transaction Bus ................................................ 136
dsPIC33FJXXXMCX06A/X08A/X10A
Code Protection ........................................................ 257, 264
CodeGuard Security ................................................. 257, 264
Configuration Bits ............................................................. 257
Configuration Register Map .............................................. 257
Configuring Analog Port Pins............................................ 164
CPU
CPU Clocking System ...................................................... 146
Customer Change Notification Service............................. 359
Customer Notification Service .......................................... 359
Customer Support............................................................. 359
D
Data Accumulators and Adder/Subtracter .......................... 33
Data Address Space........................................................... 39
DC Characteristics............................................................ 278
Development Support ....................................................... 273
DMA Module
DMAC Registers ............................................................... 137
DSP Engine ........................................................................ 31
E
ECAN Module
Control Register.......................................................... 28
PLL ........................................................................... 146
Selection................................................................... 146
Sources .................................................................... 146
Data Space Write Saturation ...................................... 35
Overflow and Saturation ............................................. 33
Round Logic ............................................................... 34
Write Back .................................................................. 34
Alignment.................................................................... 39
Memory Map for dsPIC33FJXXXMCX06A/X08A/X10A
Memory Map for dsPIC33FJXXXMCX06A/X08A/X10A
Memory Map for dsPIC33FJXXXMCX06A/X08A/X10A
Near Data Space ........................................................ 39
Software Stack ........................................................... 65
Width .......................................................................... 39
Doze Current (I
High Temperature..................................................... 328
I/O Pin Input Specifications ...................................... 283
I/O Pin Output........................................................... 329
I/O Pin Output Specifications.................................... 285
Idle Current (I
Operating Current (I
Operating MIPS vs. Voltage ..................................... 328
Power-Down Current (I
Power-down Current (I
Program Memory.............................................. 286, 329
Temperature and Voltage......................................... 328
Temperature and Voltage Specifications.................. 279
Thermal Operating Conditions.................................. 328
DMA Register Map ..................................................... 55
DMAxCNT ................................................................ 137
DMAxCON................................................................ 137
DMAxPAD ................................................................ 137
DMAxREQ ................................................................ 137
DMAxSTA................................................................. 137
DMAxSTB................................................................. 137
Multiplier ..................................................................... 33
ECAN1 Register Map (C1CTRL1.WIN = 0 or 1)......... 57
ECAN1 Register Map (C1CTRL1.WIN = 0)................ 57
Devices with 16-Kbyte RAM ............................... 41
Devices with 30-Kbyte RAM ............................... 42
Devices with 8-Kbyte RAM ................................. 40
IDLE
DOZE
) .................................................... 281
DD
)........................................ 282, 329
) ............................................ 280
PD
PD
) ........................................ 328
)........................................ 282
DS70594C-page 353