TDGL007 Microchip Technology, TDGL007 Datasheet - Page 38

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TDGL007

Manufacturer Part Number
TDGL007
Description
Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
Manufacturer
Microchip Technology
Datasheet

Specifications of TDGL007

Product
Development Boards
Interface Type
CAN, I2C
Operating Supply Voltage
5 V
dsPIC33FJXXXMCX06A/X08A/X10A
4.1.1
The
word-addressable blocks. Although it is treated as
24 bits wide, it is more appropriate to think of each
address of the program memory as a lower and upper
word, with the upper byte of the upper word being
unimplemented. The lower word always has an even
address, while the upper word has an odd address
(Figure
Program memory addresses are always word-aligned
on the lower word, and addresses are incremented or
decremented by two during code execution. This
arrangement also provides compatibility with data
memory space addressing and makes it possible to
access data in the program memory space.
FIGURE 4-2:
DS70594C-page 38
program
4-2).
0x000001
0x000003
0x000005
0x000007
Address
msw
PROGRAM MEMORY
ORGANIZATION
memory
Program Memory
PROGRAM MEMORY ORGANIZATION
‘Phantom’ Byte
(read as ‘0’)
00000000
00000000
00000000
00000000
space
most significant word
is
23
organized
in
16
Instruction Width
4.1.2
All
reserve
0x000200 for hard-coded program execution vectors.
A hardware Reset vector is provided to redirect code
execution from the default value of the PC on device
Reset to the actual start of code. A GOTO instruction is
programmed by the user at 0x000000, with the actual
address for the start of code at 0x000002.
dsPIC33FJXXXMCX06A/X08A/X10A
have two interrupt vector tables located from 0x000004
to 0x0000FF and 0x000100 to 0x0001FF. These vector
tables allow each of the many device interrupt sources
to be handled by separate Interrupt Service Routines
(ISRs). A more detailed discussion of the interrupt vec-
tor tables is provided in
Table”.
least significant word
dsPIC33FJXXXMCX06A/X08A/X10A
the
8
INTERRUPT AND TRAP VECTORS
addresses
Section 7.1 “Interrupt Vector
© 2011 Microchip Technology Inc.
between
0
(lsw Address)
PC Address
0x000000
0x000002
0x000004
0x000006
0x00000
devices
devices
also
and

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