TDGL007 Microchip Technology, TDGL007 Datasheet - Page 166
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
TDGL007
Manufacturer Part Number
TDGL007
Description
Development Boards & Kits - PIC / DSPIC DIGILENT CEREBOT MC7 MOTOR CONTROL BRD
Manufacturer
Microchip Technology
Datasheet
1.TDGL007.pdf
(362 pages)
Specifications of TDGL007
Product
Development Boards
Interface Type
CAN, I2C
Operating Supply Voltage
5 V
- Current page: 166 of 362
- Download datasheet (3Mb)
dsPIC33FJXXXMCX06A/X08A/X10A
REGISTER 12-1:
DS70594C-page 166
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
R/W-0
TON
U-0
—
TON: Timer1 On bit
1 = Starts 16-bit Timer1
0 = Stops 16-bit Timer1
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timer1 Gated Time Accumulation Enable bit
When T1CS = 1:
This bit is ignored.
When T1CS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS<1:0>: Timer1 Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
Unimplemented: Read as ‘0’
TSYNC: Timer1 External Clock Input Synchronization Select bit
When TCS = 1:
1 = Synchronize external clock input
0 = Do not synchronize external clock input
When TCS = 0:
This bit is ignored.
TCS: Timer1 Clock Source Select bit
1 = External clock from T1CK pin (on the rising edge)
0 = Internal clock (F
Unimplemented: Read as ‘0’
TGATE
R/W-0
U-0
—
T1CON: TIMER1 CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
TSIDL
R/W-0
CY
TCKPS<1:0>
)
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
TSYNC
R/W-0
U-0
—
© 2011 Microchip Technology Inc.
x = Bit is unknown
R/W-0
TCS
U-0
—
U-0
U-0
—
—
bit 8
bit 0
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