MT48LC2M32B2P-5:G Micron Technology Inc, MT48LC2M32B2P-5:G Datasheet - Page 31

IC SDRAM 64MBIT 200MHZ 86TSOP

MT48LC2M32B2P-5:G

Manufacturer Part Number
MT48LC2M32B2P-5:G
Description
IC SDRAM 64MBIT 200MHZ 86TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC2M32B2P-5:G

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (2Mx32)
Speed
200MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
86-TSOP
Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
4.5ns
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
280mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Package
86TSOP-II
Address Bus Width
13 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
4.5 ns
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 19:
Figure 20:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
Random WRITE Cycles
WRITE-to-READ
Note:
In the case of a fixed-length burst being executed to completion, a PRECHARGE
command issued at the optimum time (as described above) provides the same operation
that would result from the same fixed-length burst with auto precharge. The disadvan-
tage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length or full-page bursts.
COMMAND
COMMAND
ADDRESS
ADDRESS
Each WRITE command may be to any bank. DQM is LOW.
CLK
CLK
DQ
DQ
WRITE
BANK,
BANK,
WRITE
COL n
COL n
D
T0
D
T0
n
IN
n
IN
WRITE
BANK,
n + 1
COL a
NOP
T1
D
T1
D
a
IN
IN
TRANSITIONING DATA
31
BANK,
WRITE
COL x
BANK,
COL b
READ
T2
D
T2
x
IN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WRITE
BANK,
COL m
T3
T3
NOP
D
m
IN
DON’T CARE
NOP
D
T4
OUT
b
DON’T CARE
NOP
b + 1
T5
D
OUT
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
Commands

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