AT45DB642D-TU Atmel, AT45DB642D-TU Datasheet - Page 9

• Manufacturer Part Number: AT45DB642D-TU
• Description: IC FLASH 64MBIT 66MHZ 28TSOP
• Manufacturer: Atmel

Specifications of AT45DB642D-TU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 64M (8192 pages x 1056 bytes)
• Speed: 66MHz
• Interface: Parallel/Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSOP
• Density: 64Mb
• Access Time (max): 6ns
• Interface Type: Parallel/Serial-SPI
• Boot Type: Not Required
• Address Bus: 1/8Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP-I
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 8M
• Supply Current: 15mA
• Mounting: Surface Mount
• Pin Count: 28
• Data Bus Width: 8 bit
• Architecture: Sectored
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 15 mA
• Mounting Style: SMD/SMT
• Organization: 256 KB x 32
• Memory Configuration: 8192 Pages X 1056 Bytes
• Clock Frequency: 66MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: TSOP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7. Program and Erase Commands
7.1
7.2
7.3
3542K–DFLASH–04/09
Buffer Write
Buffer to Main Memory Page Program with Built-in Erase
Buffer to Main Memory Page Program without Built-in Erase
Following the address bytes, additional don’t care bytes (one byte if using the serial interface or
two bytes if using the 8-bit interface) must be clocked in to initialize the read operation. The CS
pin must remain low during the loading of the opcode, the address bytes, the don’t care bytes,
and the reading of data. When the end of a buffer is reached, the device will continue reading
back at the beginning of the buffer. A low-to-high transition on the CS pin will terminate the read
operation and tri-state the output pins (SO or I/O7 - I/O0).
Data can be clocked in from the input pins (SI or I/O7 - I/O0) into either buffer 1 or buffer 2. To
load data into the standard DataFlash buffer (1056 bytes), a 1-byte opcode, 84H for buffer 1 or
87H for buffer 2, must be clocked into the device, followed by three address bytes comprised of
13 don’t care bits and 11 buffer address bits (BFA10 - BFA0). The 11 buffer address bits specify
the first byte in the buffer to be written. To load data into the binary buffers (1024 bytes each), a
1-byte opcode 84H for buffer 1 or 87H for buffer 2, must be clocked into the device, followed by
three address bytes comprised of 14 don’t care bits and 10 buffer address bits (BFA9 - BFA0).
The 10 buffer address bits specify the first byte in the buffer to be written. After the last address
byte has been clocked into the device, data can then be clocked in on subsequent clock cycles.
If the end of the data buffer is reached, the device will wrap around back to the beginning of the
buffer. Data will continue to be loaded into the buffer until a low-to-high transition is detected on
the CS pin.
Data written into either buffer 1 or buffer 2 can be programmed into the main memory. A 1-byte
opcode, 83H for buffer 1 or 86H for buffer 2, must be clocked into the device. For the standard
DataFlash page size (1056 bytes), the opcode must be followed by three address bytes consist
of 13 page address bits (PA12 - PA0) that specify the page in the main memory to be written and
11 don’t care bits. To perform a buffer to main memory page program with built-in erase for the
binary page size (1024 bytes), the opcode 83H for buffer 1 or 86H for buffer 2, must be clocked
into the device followed by three address bytes consisting of 13 page address bits (A22 - A10)
that specify the page in the main memory to be written and 10 don’t care bits. When a low-to-
high transition occurs on the CS pin, the part will first erase the selected page in main memory
(the erased state is a logic 1) and then program the data stored in the buffer into the specified
page in main memory. Both the erase and the programming of the page are internally self-timed
and should take place in a maximum time of t
RDY/BUSY pin will indicate that the part is busy.
A previously-erased page within main memory can be programmed with the contents of either
buffer 1 or buffer 2. A 1-byte opcode, 88H for buffer 1 or 89H for buffer 2, must be clocked into
the device. For the standard DataFlash page size (1056 bytes), the opcode must be followed by
three address bytes consist of 13 page address bits (PA12 - PA0) that specify the page in the
main memory to be written and 11 don’t care bits. To perform a buffer to main memory page pro-
gram without built-in erase for the binary page size (1024 bytes), the opcode 88H for buffer 1 or
89H for buffer 2, must be clocked into the device followed by three address bytes consist of
13-page address bits (A22 - A10) that specify the page in the main memory to be written and
10 don’t care bits. When a low-to-high transition occurs on the CS pin, the part will program the
data stored in the buffer into the specified page in the main memory. It is necessary that the
EP
. During this time, the status register and the
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