TLE6232GP Infineon Technologies, TLE6232GP Datasheet - Page 11

• Manufacturer Part Number: TLE6232GP
• Description: IC SW SMART 6-CH LOWSIDE PDSO36
• Manufacturer: Infineon Technologies
• Type: Low Sider

Specifications of TLE6232GP

• Input Type: SPI
• Number Of Outputs: 6
• On-state Resistance: 250 mOhm, 450 mOhm
• Current - Output / Channel: 550mA, 1.1A
• Current - Peak Output: 2A, 4A
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-36
• Packages: PG-DSO-36
• Thermal Class: Heatslug down
• Id Nom: 4 x 1, 2 x 0.5 A
• Pin Count: 36.0 Pins
• Channels: 6.0
• Comment: general purpose (e.g. 4x injectors, 2x relays)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000012541; SP000308875; SP000691110; TLE6232GP; TLE6232GPNT; TLE6232GPT; TLE6232GPT; TLE6232GPTR; TLE6232GPXT

Registers MUX_REG and SCON_REG are writeable as well as readable from the microcon-
troller. The DIAG_REG can only be read from the µC.
This leads to five different control bytes which are recognized by the IC. The following table
shows the different modes.
WR_SCON
RD_SCON
WR_MUX
RD_MUX
RD_DIAG
Note:
All other possible control bytes will lead to an ignorance of the data bits, but the full diagnosis
information (like RD_DIAG command) is provided at the SO line. A reset of all fault registers
(and OT bit) the will only be done if the RD_DIAG command was clocked in.
Characteristics of the SPI Interface
If the slave select signal at CS is High or bit 7 and bit 6 of the instruction byte differ from „1“
and „0“, the state machine is set on default condition, i.e. the state machine expects an in-
struction.
If the 5V-reset (RESET) is active, the SPI output SO is switched into tri-state.
In order to increase the possible number of SPI participants on one and the same CS signal,
bits 7 and 6 of the instruction byte are fixed as shown above. While receiving the first two bits
of the instruction byte the data output SO has to be in tri-state. After having received the first
two bits TLE6232 has to decide if it is addressed (bit 7 = high, bit 6 = low). In this case the
remaining 6 bits of the instruction byte and the data byte are accepted and the diagnostic
feedback respectively the data byte content (MUX, SCON) is sent to the microcontroller. Oth-
erwise instruction and data bits are rejected and SO remains in tri-state.
V2.3
- SCON_REG: 8-bit (1 byte) length for serial control of the outputs (serial data bits)
- DIAG_REG: 16-bit (2 byte) length. Contains the diagnostic information (2 bits per chan-
nel), a common over-temperature bit and a common fault bit.
’X’ means ’don’t care’, because data will be ignored
’Dx’ represents the serial data bits, either being H (= OFF) or L (= ON)
’Mx’ enables parallel control of channel x H (=parallel) or L (=serial)
’Z’ means tri-state
’F’ is the common fault flag
’OT’ is the common over-temperature flag
’DIAx’ is the 2 bit diagnosis information per channel
SI:
SO:
SI:
SO:
SI:
SO:
SI:
SO:
SI:
SO
MSB
Z Z F
Z Z F
Z Z F
Z Z F
Z Z F
H L L H H L X X
H L L H L H X X
H L H L H L X X
H L H L L H X X
H L L L L L X X
SI Control Byte
OT DIA6 DIA5
OT DIA6 DIA5
OT DIA6 DIA5
OT DIA6 DIA5
OT DIA6 DIA5
LSB
D6 D5 D4 D3 D2 D1 X X
X X X X X X X X
SCON6 .. . SCON1 H H
M6 M5 M4 M3 M2 M1 X X
DIA4
X
MUX6
X
DIA4
MSB
DIA4
Page
X
X
SI Data Byte
DIA3
DIA3
X
X
DIA3
. .
X
X
11
MUX1
DIA2
DIA2
DIA2
X
X
X
X
DIA1
DIA1
X
H H
X
DIA1
LSB
Data Sheet TLE 6232 GP
X
X
Write to SCON Register.
Read SCON Register
Write to MUX Register.
Read MUX Register
Read DIAG Register
2009-11-18