TLE6232GP Infineon Technologies, TLE6232GP Datasheet - Page 12

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TLE6232GP

Manufacturer Part Number
TLE6232GP
Description
IC SW SMART 6-CH LOWSIDE PDSO36
Manufacturer
Infineon Technologies
Type
Low Sider
Datasheet

Specifications of TLE6232GP

Input Type
SPI
Number Of Outputs
6
On-state Resistance
250 mOhm, 450 mOhm
Current - Output / Channel
550mA, 1.1A
Current - Peak Output
2A, 4A
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
DSO-36
Packages
PG-DSO-36
Thermal Class
Heatslug down
Id Nom
4 x 1, 2 x 0.5 A
Pin Count
36.0 Pins
Channels
6.0
Comment
general purpose (e.g. 4x injectors, 2x relays)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000012541
SP000308875
SP000691110
TLE6232GP
TLE6232GPNT
TLE6232GPT
TLE6232GPT
TLE6232GPTR
TLE6232GPXT

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On a reading access the bit pattern of the data byte at the SPI input SI will be ignored. The
first SO byte sent out simultaneously by the TLE 6232 GP always contains the common fault
bit, the over-temperature bit and the diagnostic information of channels 6 and 5 (2 bits each).
Depending on the SI control byte, the second SO byte contains the requested information.
- Read back of SCON_REG (SCON bits 6 to 1 and two high bits)
- Read back of MUX_REG (MUX information for channel 6 to 1 and two high bits)
- Diagnostic information of channel 4 to 1 (2 bits per channel)
On a writing access always the full diagnostic information of the 6 channels (2 bit per channel)
and the over-temperature and common fault bit is performed.
Invalid instruction/access:
An instruction is invalid, if the following condition is fulfilled:
- an unused instruction code is detected (see tables with SPI instructions).
If an invalid instruction is detected, a writing access on a register of TLE6232 GP is not allow-
wed. In addition an access is invalid if the number of SPI clock pulses counted during active
CS differs from exactly 16 clock pulses (falling edges are counted).
- On a writing access the received data is only taken over into the internal registers and
- the fault register is only cleared by the RD_DIAG command,
if exactly 16 SPI clock pulses were counted while CS active.
V2.3
Writing access / 8 bit + 8 bit
Reading access / 8 bit + 8 bit
SS
SS
SO
SO
SI
SI
MSB
MSB
MSB
MSB
1
1
Z
Z
0
Z
0
Z
SPI Instruction
SPI Instruction
-
F
-
F OT DIA6 DIA5
-
OT DIA6 DIA5
-
resp.
-
- -
-
-
-
-
-
Page
MSB
MSB
12
DIA4 DIA3 DIA2 DIA1
XXXX XXXX
Data/8 Bit
Data/8 Bit
Data Sheet TLE 6232 GP
2009-11-18

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