THNCF512MDG Toshiba, THNCF512MDG Datasheet - Page 13

MEMORY CARD COMPACT FLASH 512MB

THNCF512MDG

Manufacturer Part Number
THNCF512MDG
Description
MEMORY CARD COMPACT FLASH 512MB
Manufacturer
Toshiba
Datasheet

Specifications of THNCF512MDG

Memory Size
512MB
Memory Type
CompactFLASH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Configuration register specifications
These registers can be used in memory card mode and I/O card mode. In True IDE mode, these registers cannot be
used.
1. Configuration Option register (Address 200h)
• INDEX bit assignment
This card supports four Configuration registers for the purpose of the configuration and observation of this card.
Note:
Note:
INDEX bit
card.
SRESET
(HOST->)
LevlREQ
(HOST->)
INDEX
(HOST->)
5
0
0
0
0
This register is used for the configuration of the card configuration status and for the issuing soft reset to the
SRESET
Name
bit7
initial value → 00H
initial value → 00H
4
0
0
0
0
3
0
0
0
0
LevIREQ
2
0
0
0
0
R/W
R/W
R/W
R/W
bit6
1
0
0
1
1
Setting this bit to “1”, places the card in the reset state (Card Hard Reset). This operation is equal
to Hard Reset, except this bit is not cleared. Then this bit set to “0”, places the card in the reset
state of Hard Reset (This bit is set to “0” by Hard Reset). Card configuration status is reset and
the card internal initialized operation starts when Card Hard Reset is executed, so next access to
the card should be the same sequence as the power on sequence.
This bit sets to “0” when pulse mode interrupt is selected, and “1” when level mode interrupt is
selected.
This bits is used for select operation mode of the card as follows.
When Power on, Card Hard Reset and Soft Reset, this data is “000000” for the purpose of
Memory card interface recognition.
0
0
1
0
1
bit5
Memory card
Card mode
I/O card
I/O card
I/O card
TENTATIVE
bit4
1F0H to 1F7H, 3F6H to 3F7H
170H to 177H, 376H to 377H
bit3
Task file register address
0H to FH, 400H to 7FFH
Function
INDEX
xx0H to xxFH
bit2
THNCFxxxxDG Series
2004-05-18 13/44
Contiguous I/O mapped
bit1
Secondary I/O mapped
Primary I/O mapped
Memory mapped
Mapping mode
bit0

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