THNCF512MDG Toshiba, THNCF512MDG Datasheet - Page 7

• Manufacturer Part Number: THNCF512MDG
• Description: MEMORY CARD COMPACT FLASH 512MB
• Manufacturer: Toshiba

Specifications of THNCF512MDG

• Memory Size: 512MB
• Memory Type: CompactFLASH
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

−
(PC Card Memory Mode)
−
(PC Card I/O Mode)
−
(True IDE Mode)
−
(PC Card Memory Mode)
−
(PC Card I/O Mode)
−
(True IDE Mode)
−
(PC Card Memory Mode)
−
(PC Card I/O Mode)
−
(True IDE Mode)
−
(PC Card Memory Mode)
−
(PC Card I/O Mode)
−
(True IDE Mode)
−
(PC Card Memory Mode)
−
(PC Card I/O Mode)
−
(True IDE Mode)
READY
(PC Card Memory Mode)
−
(PC Card I/O Mode)
INTRQ
(True IDE Mode)
INPACK
INPACK
INPACK
IORD
IORD
DIOR
IOWR
IOWR
DIOW
OE
OE
ATA SEL
REG
REG
REG
IREQ
Signal Name
Dir
O
O
I
I
I
I
Pin No.
TENTATIVE
43
34
35
44
37
9
This signal is not used in this mode. Should not be connected at
the host.
The Input Acknowledge signal is asserted by the CompactFlash
Storage Card when the card is selected and responding to an I/O
read cycle at the address that is on the address bus. This signal is
used by the host to control the enable of any input data buffers
between the CompactFlash Storage Card and the CPU.
This signal is not used in this mode. Should not be connected at
the host.
This signal is not used in this mode.
This is an I/O Read strobe generated by the host. This signal gates
I/O data onto the bus from the CompcatFlash Storage Card when
the card is configured to use the I/O interface.
In True IDE Mode, this signal has same function as in PC Card I/O
Mode.
This signal is not used in this mode.
The I/O Write strobe pulse is used to clock I/O data on the Card
Data bus into the CompactFlash Storage Card controller registers
when the CompactFlash Storage Card is configured to use the I/O
interface.
The clocking will occur on the negative to positive edge of the
signal (trailing edge)
In True IDE Mode, this signal has the same function as in PC Card
I/O Mode.
This is an Output Enable strobe generated by the host interface .It
is used to read data from the CompactFlash Storage Card in
Memory Mode and to read the CIS and configuration registers.
In PC Card I/O Mode, this signal is used to read the CIS and
configuration registers.
To enable True IDE Mode this input should be grounded by the
host .
This signal is used during Memory Cycles to distinguish between
Common Memory and Register (Attribute) Memory accesses. High
for Common Memory, Low for Attribute Memory.
The signal must also be active (low) during I/O Cycles when the I/O
address is on the Bus.
This signal is not used in this mode.
In Memory Mode, this signal is held high when the CompactFlash
Storage Card is ready to accept a operation. When the card is
busy, this signal is held low. The Host memory card socket must
provide a pull-up resistor.
At power up or at Reset, the READY signal is held low until the
CompactFlash Storage Card has completed its power up or reset
function. No access of any type should be made to the
CompactFlash Storage Card during this time.
This signal is used as interrupt Request. This line is assert low to
indicate a interrupt request is issued.
In True IDE Mode signal is the active high interrupt Request to the
host.
Description
THNCFxxxxDG Series
2004-05-18 7/44