C8051T600SDB Silicon Laboratories Inc, C8051T600SDB Datasheet - Page 112

BOARD SOCKET DAUGHTER SOIC

C8051T600SDB

Manufacturer Part Number
C8051T600SDB
Description
BOARD SOCKET DAUGHTER SOIC
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051T600SDB

Module/board Type
Socket Module - SOIC
Data Bus Width
8 bit
Operating Supply Voltage
+ 1.8 V to + 3.6 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051T600DK
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1405
C8051T600/1/2/3/4/5/6
112
SYSCLK
Function
Figure 22.4. Priority Crossbar Decoder Example 1 - No Skipped Pins
Pin Skip
Settings
Special
Signals
CP0A
CEX0
CEX1
CEX2
SDA
RX0
SCL
CP0
Port
TX0
ECI
Pin
T0
T1
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 x
XBR0
P0
In this example, the crossbar is configured to
assign the UART TX0 and RX0 signals, the
SMBus signals, and the SYSCLK signal. Note
that the SMBus signals are assigned as a pair,
and there are no pins skipped using the XBR0
register.
are used by the peripherals in this configuration.
1
2
3
respectively.
4
All unassigned pins can be used as GPIO or for
other non-crossbar functions.
Rev. 1.2
st
nd
rd
th
TX0 is assigned to P0.4
SYSCLK is assigned to P0.2
SDA and SCL are assigned to P0.0 and P0.1,
RX0 is assigned to P0.5
These boxes represent the port pins which

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