ADC1415S125/DB,598 NXP Semiconductors, ADC1415S125/DB,598 Datasheet - Page 5

• Manufacturer Part Number: ADC1415S125/DB,598
• Description: BOARD DEMO FOR ADC1415S125
• Manufacturer: NXP Semiconductors
• Type: A/Dr

Specifications of ADC1415S125/DB,598

• Number Of Adc's: 1
• Number Of Bits: 14
• Sampling Rate (per Second): 125M
• Data Interface: Serial, SPI™
• Inputs Per Adc: 1 Differential
• Input Range: 1 ~ 2 Vpp
• Power (typ) @ Conditions: 840mW @ 125Msps
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC1415S125
• Product: Data Conversion Development Tools
• Conversion Rate: 125 MSPS
• Resolution: 14 bit
• Interface Type: SMA
• For Use With/related Products: ADC1415S125
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5094

NXP Semiconductors
ADC1415S_SER
Product data sheet
Table 2.
[1]
Table 3.
Symbol
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DAV
n.c.
VDDO
OGND
OTR
SCLK/DFS
SDIO/ODS
CS
SENSE
VREF
Symbol
D12_D13_M 17
D12_D13_P
D10_D11_M
D10_D11_P
D8_D9_M
D8_D9_P
D6_D7_M
D6_D7_P
D4_D5_M
D4_D5_P
D2_D3_M
D2_D3_P
D0_D1_M
P: power supply; G: ground; I: input; O: output; I/O: input/output.
Pin description (CMOS digital outputs)
Pin description (LVDS DDR) digital outputs)
Pin
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin
18
19
20
21
22
23
24
25
26
27
28
29
All information provided in this document is subject to legal disclaimers.
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
[1]
Type
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
-
P
G
O
I
I/O
I
I
I/O
Rev. 4 — 17 December 2010
Type
O
O
O
O
O
O
O
O
O
O
O
O
O
[1]
[2]
Description
differential output data D12 and D13 multiplexed, complement
differential output data D12 and D13 multiplexed, true
differential output data D10 and D11 multiplexed, complement
differential output data D10 and D11 multiplexed, true
differential output data D8 and D9 multiplexed, complement
differential output data D8 and D9 multiplexed, true
differential output data D6 and D7 multiplexed, complement
differential output data D6 and D7 multiplexed, true
differential output data D4 and D5 multiplexed, complement
differential output data D4 and D5 multiplexed, true
differential output data D2 and D3 multiplexed, complement
differential output data D2 and D3 multiplexed, true
differential output data D0 and D1 multiplexed, complement
Description
data output bit 13 (Most Significant Bit (MSB))
data output bit 12
data output bit 11
data output bit10
data output bit 9
data output bit 8
data output bit 7
data output bit 6
data output bit 5
data output bit 4
data output bit 3
data output bit 2
data output bit 1
data output bit 0 (Least Significant Bit (LSB))
data valid output clock
not connected
output power supply
output ground
out of range
SPI clock / data format select
SPI data IO / output data standard
SPI chip select
reference programming pin
voltage reference input/output
…continued
ADC1415S series
© NXP B.V. 2010. All rights reserved.
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