MC56F8037EVM Freescale Semiconductor, MC56F8037EVM Datasheet - Page 105

• Manufacturer Part Number: MC56F8037EVM
• Description: BOARD EVAL FOR MC56F8037
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of MC56F8037EVM

• Contents: Board, Cables, CD, Debugger
• Silicon Manufacturer: Freescale
• Core Architecture: 56800/E
• Core Sub-architecture: 56800/E
• Silicon Core Number: MC56F
• Silicon Family Name: MC56F80xx
• Kit Contents: MC56F8037EVM, USB-JTAG Adapter, Cables, CD
• Rohs Compliant: Yes
• For Use With/related Products: MC56F8037
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.10.1
This bit field is reserved. It must be set to 0.
6.3.10.2
6.3.10.3
6.3.10.4
6.3.10.5
This bit field is reserved. Each bit must be set to 0.
6.3.10.6
6.3.10.7
6.3.10.8
6.3.10.9
6.3.10.10 Quad Timer A, Channel 3 Clock Enable (TA3)—Bit 3
6.3.10.11 Quad Timer A, Channel 2 Clock Enable (TA2)—Bit 2
Freescale Semiconductor
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0 = The clock is not provided to the PIT2 module (the PIT2 module is disabled)
1 = The clock is enabled to the PIT2 module
0 = The clock is not provided to the PIT1 module (the PIT1 module is disabled)
1 = The clock is enabled to the PIT1 module
0 = The clock is not provided to the PIT0 module (the PIT0 module is disabled)
1 = The clock is enabled to the PIT0 module
0 = The clock is not provided to the Timer B3 module (the Timer B3 module is disabled)
1 = The clock is enabled to the Timer B3 module
0 = The clock is not provided to the Timer B2 module (the Timer B2 module is disabled)
1 = The clock is enabled to the Timer B2 module
0 = The clock is not provided to the Timer B1 module (the Timer B1 module is disabled)
1 = The clock is enabled to the Timer B1 module
0 = The clock is not provided to the Timer B0 module (the Timer B0 module is disabled)
1 = The clock is enabled to the Timer B0 module
0 = The clock is not provided to the Timer A3 module (the Timer A3 module is disabled)
1 = The clock is enabled to the Timer A3 module
0 = The clock is not provided to the Timer A2 module (the Timer A2 module is disabled)
1 = The clock is enabled to the Timer A2 module
Reserved—Bit 15
Programmable Interval Timer 2 Clock Enable (PIT2)—Bit 14
Programmable Interval Timer 1 Clock Enable (PIT1)—Bit 13
Programmable Interval Timer 0 Clock Enable (PIT0)—Bit 12
Reserved—Bits 11–8
Quad Timer B, Channel 3 Clock Enable (TB3)—Bit 7
Quad Timer B, Channel 2 Clock Enable (TB2)—Bit 6
Quad Timer B, Channel 1 Clock Enable (TB1)—Bit 5
Quad Timer B, Channel 0 Clock Enable (TB0)—Bit 4
56F8037/56F8027 Data Sheet, Rev. 7
Register Descriptions
105