MC56F8037EVM Freescale Semiconductor, MC56F8037EVM Datasheet - Page 32

• Manufacturer Part Number: MC56F8037EVM
• Description: BOARD EVAL FOR MC56F8037
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of MC56F8037EVM

• Contents: Board, Cables, CD, Debugger
• Silicon Manufacturer: Freescale
• Core Architecture: 56800/E
• Core Sub-architecture: 56800/E
• Silicon Core Number: MC56F
• Silicon Family Name: MC56F80xx
• Kit Contents: MC56F8037EVM, USB-JTAG Adapter, Cables, CD
• Rohs Compliant: Yes
• For Use With/related Products: MC56F8037
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

32
Table 2-3 56F8037/56F8027 Signal and Package Information for the 64-Pin LQFP (Continued)
18
19
20
Return to
(FAULT3)
The TB0 signal is also brought out on the GPIOB4 and GPIOB10 pins.
The TA0 signal is also brought out on the GPIOB4 and GPIOA6 pins.
The TA1 signal is also brought out on the GPIOA12 pin.
(PSRC2)
GPIOB4
GPIOB5
(CLKIN)
(CLKO)
(TB0
(TA0
(TA1
Signal
Name
(SS1)
18
19
20
)
)
)
Table 2-2
Pin No.
LQFP
38
4
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
Input
Input
State During
enabled
enabled
internal
internal
pull-up
pull-up
Reset
Input,
Input,
56F8037/56F8027 Data Sheet, Rev. 7
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
QSPI1 Slave Select — This is used in slave mode to indicate to the
QSPI1 module that the current transfer is to be received.
TB0 — Timer B, Channel 0
TA0 — Timer A, Channel 0
PSRC2 — External PWM signal source input for the complementary
PWM0/PWM1 pair.
Clock Output — This is a buffered clock output; the clock source is
selected by Clockout Select (CLKOSEL) bits in the Clock Output
Select Register (CLKOUT). See
After reset, the default state is GPIOB4. The peripheral functionality
is controlled via the SIM. See
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TA1 — Timer A, Channel 1
FAULT3 — This fault input pin is used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
External Clock Input— This pin serves as an external clock input.
After reset, the default state is GPIOB5. The peripheral functionality
is controlled via the SIM. See
Signal Description
Section
Section
Section
6.3.16.
6.3.16.
6.3.7.
Freescale Semiconductor