MPC8360E-RDK Freescale Semiconductor, MPC8360E-RDK Datasheet - Page 36

• Manufacturer Part Number: MPC8360E-RDK
• Description: BOARD REFERENCE DESIGN FOR MPC
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II™ PROr
• Type: MPUr

Specifications of MPC8360E-RDK

• Contents: Board, Cables, CD, Power Supply
• Processor To Be Evaluated: MPC8360E
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB
• Operating Supply Voltage: 1.3 V
• For Use With/related Products: MPC8360E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UCC Ethernet Controller: Three-Speed Ethernet, MII Management
8.2.4
This section describes the TBI transmit and receive AC timing specifications.
8.2.4.1
Table 33
Figure 18
36
At recommended operating conditions with LV
GTX_CLK clock period
GTX_CLK duty cycle
GTX_CLK to TBI data TCG[9:0] delay
GTX_CLK clock rise time, (20% to 80%)
GTX_CLK clock fall time, (80% to 20%)
GTX_CLK125 reference clock period
GTX_CLK125 reference clock duty cycle
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. This symbol is used to represent the external GTX_CLK125 and does not follow the original symbol naming convention.
3. In rev. 2.0 silicon, due to errata, t
inputs and t
transmit timing (TT) with respect to the time from t
state (V) or setup time. Also, t
(H) until the referenced data signals (D) reach the invalid state (X) or hold time. Note that, in general, the clock reference
symbol representation is based on three letters representing the clock of a particular functional. For example, the subscript
of t
letter: R (rise) or F (fall).
MPC8360E, Rev. 1 .
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
TTX
represents the TBI (T) transmit (TX) clock. For rise and fall times, the latter convention is used with the appropriate
provides the TBI transmit AC timing specifications.
shows the TBI transmit AC timing diagram.
TBI AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
Parameter/Condition
TBI Transmit AC Timing Specifications
GTX_CLK
TXD[7:0]
TX_EN
TX_ER
TTKHDX
Table 33. TBI Transmit AC Timing Specifications
TTKHDX
Figure 18. TBI Transmit AC Timing Diagram
t
symbolizes the TBI transmit timing (TT) with respect to the time from t
TTXH
DD
/OV
minimum is 0.7 ns for UCC1. Refer to Errata QE_ENET19 in Chip Errata for the
DD
t
TTX
of 3.3 V ± 10%.
TTX
t
(K) going high (H) until the referenced data signals (D) reach the valid
G125H
t
Symbol
TTXH
t
t
TTKHDX
TTKHDV
t
t
t
t
TTXR
TTXF
G125
TTX
/t
/t
TTX
G125
t
1
TTXF
(first two letters of functional block)(signal)(state )(reference)(state)
for outputs. For example, t
Min
1.0
40
45
—
—
—
—
—
t
TTKHDX
t
TTXR
Typ
8.0
8.0
—
—
—
—
—
TTKHDV
Max
5.0
1.0
1.0
60
55
—
—
—
Freescale Semiconductor
symbolizes the TBI
TTX
Unit
(K) going high
ns
ns
ns
ns
ns
ns
%
Notes
—
—
—
—
—
for
3
2