MPC8360E-RDK Freescale Semiconductor, MPC8360E-RDK Datasheet - Page 4

• Manufacturer Part Number: MPC8360E-RDK
• Description: BOARD REFERENCE DESIGN FOR MPC
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II™ PROr
• Type: MPUr

Specifications of MPC8360E-RDK

• Contents: Board, Cables, CD, Power Supply
• Processor To Be Evaluated: MPC8360E
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB
• Operating Supply Voltage: 1.3 V
• For Use With/related Products: MPC8360E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Overview
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MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
1.SMII or SGMII media-independent interface is not currently supported.
— QUICC Engine module peripheral request interface (for SEC, PCI, IEEE Std. 1588™)
— Eight universal communication controllers (UCCs) on the MPC8360E and six UCCs on the
MPC8358E supporting the following protocols and interfaces (not all of them simultaneously):
– IEEE 1588 protocol supported
– 10/100 Mbps Ethernet/IEEE Std. 802.3™ CDMA/CS interface through a
– 1000 Mbps Ethernet/IEEE 802.3 CDMA/CS interface through a media-independent
– 9.6-Kbyte jumbo frames
– ATM full-duplex SAR, up to 622 Mbps (OC-12/STM-4), AAL0, AAL1, and AAL5 in
– ATM AAL2 CPS, SSSAR, and SSTED up to 155 Mbps (OC-3/STM-1) Mbps full duplex
– ATM traffic shaping for CBR, VBR, UBR, and GFR traffic types compatible with ATM
– ATM AAL1 structured and unstructured circuit emulation service (CES 2.0) in accordance
– IMA (Inverse Multiplexing over ATM) for up to 31 IMA links over 8 IMA groups in
– ATM Transmission Convergence layer support in accordance with ITU-T I.432
– ATM OAM handling features compatible with ITU-T I.610
– PPP, Multi-Link (ML-PPP), Multi-Class (MC-PPP) and PPP mux in accordance with the
– IP support for IPv4 packets including TOS, TTL, and header checksum processing
– Ethernet over first mile IEEE 802.3ah
– Shim header
– Ethernet-to-Ethernet/AAL5/AAL2 inter-working
– L2 Ethernet switching using MAC address or IEEE Std. 802.1P/Q™ VLAN tags
– ATM (AAL2/AAL5) to Ethernet (IP) interworking in accordance with RFC2684 including
– Extensive support for ATM statistics and Ethernet RMON/MIB statistics
– AAL2 protocol rate up to 4 CPS at OC-3/STM-1 rate
– Packet over Sonet (POS) up to 622-Mbps full-duplex 124 MultiPHY
– POS hardware; microcode must be loaded as an IRAM package
– Transparent up to 70-Mbps full-duplex
– HDLC up to 70-Mbps full-duplex
– HDLC BUS up to 10 Mbps
media-independent interface (MII, RMII, RGMII)
interface (GMII, RGMII, TBI, RTBI) on UCC1 and UCC2
accordance ITU-T I.363.5
(with 4 CPS packets per cell) in accordance ITU-T I.366.1 and I.363.2
forum TM4.1 for up to 64-Kbyte simultaneous ATM channels
with ITU-T I.163.1 and ATM Forum af-vtoa-00-0078.000
accordance with the ATM forum AF-PHY-0086.000 (Version 1.0) and AF-PHY-0086.001
(Version 1.1)
following RFCs: 1661, 1662, 1990, 2686, and 3153
bridging of ATM ports to Ethernet ports
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