DK-DEV-3CLS200N Altera, DK-DEV-3CLS200N Datasheet - Page 20

KIT DEV CYCLONE III LS EP3CLS200

DK-DEV-3CLS200N

Manufacturer Part Number
DK-DEV-3CLS200N
Description
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer
Altera
Series
Cyclone® IIIr
Type
FPGAr

Specifications of DK-DEV-3CLS200N

Contents
Board
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Cyclone
Silicon Core Number
EP3C
Silicon Family Name
Cyclone III LS
Rohs Compliant
Yes
For Use With/related Products
EP3CLS200
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2601
1–20
Table 1–27. Cyclone III Devices Emulated RSDS_E_1R Transmitter Timing Specifications
Table 1–28. Cyclone III Devices Mini-LVDS Transmitter Timing Specifications
Cyclone III Device Handbook, Volume 2
t
t
t
Notes to
(1) Emulated RSDS_E_1R transmitter is supported at the output pin of all I/O banks.
(2) t
f
clock
frequency)
Device
operation in
Mbps
t
TCCS
Output jitter
(peak to
peak)
t
t
t
Notes to
(1) Applicable for true and emulated mini-LVDS transmitter.
(2) True mini-LVDS transmitter is only supported at the output pin of Row I/O (Banks 1, 2, 5, and 6). Emulated mini-LVDS transmitter is supported
(3) t
RISE
FALL
LOCK
HSC LK
DUTY
RISE
FALL
LOCK
Symbol
Symbol
(2)
(3)
at the output pin of all I/O banks.
LOC K
LOC K
(input
Table
Table
is the time required for the PLL to lock from the end of device configuration.
is the time required for the PLL to lock from the end of device configuration.
1–27:
1–28:
20 – 80%,
C
20 – 80%,
C
20 – 80%,
C
20 – 80%,
C
LOAD
LOAD
LOAD
LOAD
Modes
= 5 pF
= 5 pF
Modes
= 5 pF
= 5 pF
×10
×10
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
Min
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
500
500
Typ
C6
C6
Typ
500
500
Max
Max
200
200
200
200
200
400
400
400
400
400
400
400
200
500
55
1
1
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
Min
C7, I7
C7, I7
500
500
Typ
500
500
Typ
155.5
155.5
155.5
155.5
155.5
(Note 1)
Max
311
311
311
311
311
311
311
200
500
55
1
Max
1
,
(2)
Min
Chapter 1: Cyclone III Device Data Sheet
100
10
10
10
10
10
10
80
70
40
20
10
45
(Note 1)
Min
© January 2010 Altera Corporation
C8, A7
C8, A7
500
500
Typ
500
500
Typ
(Part 2 of 2)
Switching Characteristics
155.5
155.5
155.5
155.5
155.5
Max
311
311
311
311
311
311
311
200
550
Max
55
1
1
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
ms
ms
ps
ps
ps
ps
ps
ps
%

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