M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 199

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

[Precautions when operating in clock synchronous serial I/O mode]
1. The transfer clock is generated by operation of the transmit control circuit. Accordingly, even when
2. When an internal clock is selected during reception, the transfer clock is generated by setting the transmit
3. When selecting an external clock, satisfy the following 3 conditions with the input to CLK
4. When receiving data, write dummy data to the low-oreder byte of the UARTi transmission buffer register
5. The output level of the RTS
enable bit to “1” (transmission enabled) and setting dummy data to the UARTi transmission buffer register.
When an external clock is selected , the transfer clock is generated by setting the transmit enable bit to
“1” and inputting a clock to the CLK
register.
performing only reception, transmit operation (setting for transmission) must be performed. In this case,
dummy data is output from the TxD
<When transmitting>
<When receiving>
for each reception of 1-byte data.
output level of this pin becomes “H” when receive starts, and it becomes “L” when receive is completed.
The output level of this pin changes regardless of the contents of the transmit enable bit, the transmission
buffer empty flag, and the receive complete flag.
Set the transmit enable bit to “1.”
Write transmit data to the UARTi transmit buffer register.
Input “L” level to the
Set the receive enable bit to “1.”
Set the transmit enable bit to “1.”
Write dummy data to the UARTi transmit buffer register.
____
____
CTS
i
pin becomes “L” simultaneously at setting the receive enable bit to “1.” The
i
pin (when selecting the
i
i
7702/7703 Group User’s Manual
pin.
pin after setting dummy data to the UARTi transmission buffer
7.3 Clock synchronous serial I/O mode
____
CTS
function).
SERIAL I/O
i
pin = “H” level.
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