M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 304

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M37702E6BFS

Manufacturer Part Number
M37702E6BFS
Description
EPROM MCU/8BIT CMOS EMULATION CH
Manufacturer
Renesas Electronics America
Datasheet

Specifications of M37702E6BFS

Accessory Type
Emulator EPROM MCU
For Use With/related Products
7702
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M37702E6BFS
Manufacturer:
MITSUBISHI/三菱
Quantity:
20 000
CLOCK GENERATING CIRCUIT
14.2 Clock
14–4
14.2.1 Clock generated in clock generating circuit
(1)
(2)
(3) Clock
(4) f
2
acceptance of Hold request.
execution of the STP instruction.
It is the operation clock of BIU. It is also the clock source of
The
CPU
It is the operation clock of CPU. The
•Execution of the STP or WIT instruction,
•Ready request; “L” level input to RDY pin
•Wait request from BIU; Hold request acceptance included
It has the same period as
It is not stopped by Ready request or acceptance of Hold request, or execution of the WIT instruction.
Each of them is the internal peripheral devices’ operating clock.
Note: Refer to each functional description for details:
to f
512
•Execution of STP instruction ............. “Chapter 10. STOP MODE”
•Execution of WIT instruction .............. “Chapter 11. WAIT MODE”
•Ready ..................................................... “Paragraph. 12.3 Ready function”
•Hold ........................................................ “Paragraph. 12.4 Hold function”
stops by Ready request or execution of the STP or WIT instruction. It is not stopped by
1
and is output to the external from the
7702/7703 Group User’s Manual
____
CPU
stops by the following:
CPU
.
1
pin. The clock
1
stops by

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