M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 520

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

manual only.
instruction
to external device
GLOSSARY
This section briefly explains the terms used in this user’s manual. The terms defined here apply to this
Access
Access area
Access characteristics
Baud rate
Branch
Bus control signal
Count source
Counter contents (values)
Down-count
Event counter mode
External area
External bus
External device
Gate function of Timer
Internal area
Interrupt routine
LSB first
Overflow
Power saving
R e a d - m o d i f y - w r i t e
Signal required for access
Stop mode
Synchronizing clock
2
Term
Means performing read, write, or read and write.
An accessible memory space of up to 16 Mbytes.
Means whether accessible or not.
Means a transfer rate of Serial I/O
Means moving the program’s execution point (= address) to another location.
A generic name for ALE, E, BHE, R/W, RDY, HOLD, HLDA and
BYTE signals.
A signal that is counted by Timers A and B, the UARTi baud rate
register (BRGi) and Watchdog timer. That is f
by the count source select bits and others.
Means a value read when reading the timer Ai and Bi registers.
Means decreasing by 1 and counting.
Means the mode of Timers which can count the number of external
pulses exactly without a divider.
An accessible area for external devices connected in the memory
expansion or microprocessor mode. It is up to 16-Mbyte external
area.
A generic name for the external address bus and the data bus.
Devices connected externally to the microcomputer. A generic
name for a memory, an I/O device and a peripheral IC.
Means the function that the user can control input of the timer
count source.
An accessible internal area. A generic name for areas of the
internal RAM, internal ROM and the SFR.
A routine that is automatically executed when an interrupt request
is accepted. Set the start address of this routine into the interrupt
vector table.
Means a transfer data format of Serial I/O;LSB is transferred
first.
A state where the up-count resultant is greater than the counter
resolution.
Means reducing a power dissipation by Stop mode, Wait mode or
others
An instruction that reads the memory contents, modifies them
and writes back to the same address. Relevant instructions are
the ASL, CLB, DEC, INC, LSR, ROL, ROR, SEB instructions.
A generic name for bus control, address bus, and data bus signals.
A state where the oscillation circuit halts and the program execution
is stopped. By executing the STP instruction, the microcomputer
enters Stop mode.
Means a transfer clock of the clock synchronous serial I/O.
7702/7703 Group User’s Manual
_
Meaning
____
__
____
2
, f
16
_____
, f
64
, f
512
_____
selected
Access
Access
Up-count
Internal area
External area
Under flow
Up-count
Stop mode
Wait mode
B u s c o n t r o l
signal
Wait mode
Relevant term