M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 33

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Fig. 2.1.3 Program counter and program bank register
2.1.5 Program counter (PC)
The program counter is a 16-bit counter that indicates the low-order 16 bits of the address (24 bits) at
which an instruction to be executed next (in other words, an instruction to be read out from an instruction
queue buffer next) is stored. The contents of the high-order program counter (PC
low-order program counter (PC
the contents of the reset’s vector address (addresses FFFE
Figure 2.1.3 shows the program counter and the program bank register.
2.1.6 Program bank register (PG)
The program bank register is an 8-bit register. This register indicates the high-order 8 bits of the address
(24 bits) at which an instruction to be executed next (in other words, an instruction to be read out from an
instruction queue buffer next) is stored. These 8 bits are called bank.
When a carry occurs after adding the contents of the program counter or adding the offset value to the
contents of the program counter in the branch instruction and others, the contents of the program bank
register is automatically incremented by 1. When a borrow occurs after subtracting the contents of the
program counter, the contents of the program bank register is automatically decremented by 1. Accordingly,
there is no need to consider bank boundaries in programming, usually.
In the single-chip mode, make sure to prevent the program bank register from being set to the value other
than “00
chip mode is the internal area within the bank 0
This register is cleared to “00
16
” by executing the branch instructions and others. It is because the access space of the single-
(b23)
b7
PG
16
CENTRAL PROCESSING UNIT (CPU)
L
” at reset.
) becomes “FE
(b16)
b0 b15
7702/7703 Group User’s Manual
16
” at reset. The contents of the program counter becomes
16
.
PC
H
16
, FFFF
b8 b7
16
2.1 Central processing unit
) immediately after reset.
PC
L
H
) become “FF
b0
16
,” and the
2–5