M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 53

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Fig. 2.5.3 Timing when pin functions are switched
2.5.3 Setting processor modes
The voltage supplied to the CNVss pin and the processor mode bits (bits 1 and 0 at address 5E
processor mode.
Table 2.5.2 lists the methods for setting processor modes. Figure 2.5.4 shows the structure of processor
mode register (address 5E
When Vss level is supplied to CNVss pin
After a reset, the microcomputer starts operating in the single-chip mode. The processor mode is switched
by the processor mode bits after the microcomputer starts operating. When the processor mode bits are
set to “01
the microcomputer enters the microprocessor mode.
The processor mode is switched at the rising edge of signal E after writing to the processor mode bits.
Figure 2.5.3 shows the timing when pin functions are switched by switching the processor mode from the
single-chip mode to the memory expansion or microprocessor mode with the processor mode bits.
When the processor mode is switched during the program execution, the contents of the instruction
queue buffer is not initialized. (Refer to “Appendix 6. Q & A.”)
When Vcc level is supplied to CNVss pin
After a reset, the microcomputer starts operating in the microprocessor mode. In this case, the microcomputer
cannot operate in the other modes. (Fix the processor mode bits to “10
Note: Functions of pins P0
2
,” the microcomputer enters the memory expansion mode; when these bits are set to “10
Function of pin P4
microprocessor mode.
P0
E
0
16
).
2
is, however, switched only when the processor mode is switched to the
CENTRAL PROCESSING UNIT (CPU)
1
to P0
Programmable I/O port P0
7
, P1 to P3, P4
7702/7703 Group User’s Manual
Written to processor mode bits
0
to P4
2
0
are switched at the same timing shown above.
_
External address bus A
2
.”)
2.5 Processor modes
0
16
) set the
2–25
2
,”