M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 293

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Fig. 13.1.3 State of SFR and internal RAM areas immediately after reset (1)
Note : In the 7703 Group, after a reset, set “1” to the bits which do not have corresponding pins. (Refer to section “20.4.1 I/O
SFR area (0
1C
1D
A ddr ess
1A
1B
1E
1F
10
11
12
13
14
15
16
17
18
19
WO
RW
R O
0 : “0” immediately after a reset.
1 : “1” immediately after a reset.
? : Undef i ned immediately after
C
D
A
B
E
1
2
3
4
5
6
7
8
9
F
pin.”)
0
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
a reset.
: It is possible to read the bit state at reading. The written value becomes valid data.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid data. It is not possible to read the bit state.
: Nothing is assigned. It is not possible to read the bit state. The written value becomes invalid.
Port P5 direction register
Port P6 direction register
Port P7 direction register
Port P0 direction register
Port P1 direction register
Port P2 direction register
Port P3 direction register
Port P4 direction register
Port P8 direction register
A-D control register
A-D sweep pin select register
Register name
Port P8 register
Port P0 register
Port P1 register
Port P2 register
Port P3 register
Port P4 register
Port P5 register
Port P6 register
Port P7 register
16
to 7F
16
)
b7
7702/7703 Group User’s Manual
Access characteristics
0
?
0
0
@
: “0” immediately after a reset. Fix to “0.”
: Always “0” at reading.
: Always undefined at reading.
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
b0
b7
State immediately after a reset
0
0
?
0
?
0
0
0
?
0
0
0
0
?
0
0
00
00
00
00
00
00
00
00
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
13.1 Hardware reset
16
16
16
16
16
16
16
16
?
0
0
?
0
?
0
?
1
0
1
RESET
b0
(Note)
(Note)
(Note)
(Note)
(Note)
13–5