DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 124

• Manufacturer Part Number: DSPIC30F1010-30I/SO
• Description: IC DSPIC MCU/DSP 6K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F1010/202X
12.4.4
Multi-Phase PWM, as shown in Figure 12-6, uses
phase-shift values in the Phase registers to shift the
PWM outputs relative to the primary time base.
Because the phase-shift values are added to the pri-
mary time base, the phase-shifted outputs occur earlier
than a PWM channel that specifies zero phase shift. In
Multi-Phase mode, the specified phase shift is fixed by
the application’s design.
FIGURE 12-6:
12.4.5
Figure 12-7 shows the waveforms for Variable Phase-
Shift PWM. Power-converter circuits constantly change
the phase shift among PWM channels as a means to
control the flow of power, in contrast to most PWM cir-
cuits that vary the duty cycle of PWM signals to control
power flow. Often, in variable phase applications, the
PWM duty cycle is maintained at 50%. The phase-shift
value should be updated when the PWM signal is not
asserted. Complementary outputs are available in Vari-
able Phase-Shift mode.
FIGURE 12-7:
DS70178C-page 122
PWM1H
PWM2H
PWM4H
PWM3H
PWM2H
PWM1H
Phase2 (old value)
Duty Cycle
MULTI-PHASE PWM MODE
VARIABLE PHASE PWM MODE
Duty Cycle
Duty Cycle
Phase4
Duty Cycle
Phase3
MULTI-PHASE PWM
VARIABLE PHASE PWM
Period
Phase2
Duty Cycle
Period
PTMR=0
Phase2 (new value)
Duty Cycle
Duty Cycle
Duty Cycle
Preliminary
12.4.6
Figure 12-8
mode. This mode truncates the asserted PWM signal
when the selected external Fault signal is asserted.
The PWM output values are specified by the Fault
override bits (FLTDAT<1:0>) in the IOCONx register.
The override output remains in effect until the begin-
ning of the next PWM cycle. This mode is sometimes
used in Power Factor Correction (PFC) circuits where
the inductor current controls the PWM on time. This is
a constant frequency PWM mode.
FIGURE 12-8:
Period
Value
Duty
Cycle
PWMH
PWMH
0
FLTx Negates PWM
Timer
Value
CURRENT-LIMIT PWM MODE
Duty Cycle
Programmed
Duty Cycle
Actual
shows
CYCLE-BY-CYCLE
CURRENT-LIMIT PWM
MODE
Cycle-by-Cycle
© 2006 Microchip Technology Inc.
FLTx Negates PWM
Programmed
Duty Cycle
Duty Cycle
Actual
Current-Limit