ATTINY25V-10MU Atmel, ATTINY25V-10MU Datasheet - Page 153

• Manufacturer Part Number: ATTINY25V-10MU
• Description: IC MCU AVR 2K FLASH 10MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY25V-10MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: USI
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIPATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.2.1
20.3
2586M–AVR–07/10
Device Signature Imprint Table
Latching of Fuses
Table 20-5.
Notes:
Note that fuse bits are locked if Lock Bit 1 (LB1) is programmed. Fuse bits should be pro-
grammed before lock bits. The status of fuse bits is not affected by chip erase.
Lock bits can also be read by device firmware. See section
Data from Software” on page
Fuse values are latched when the device enters programming mode and changes to fuse values
will have no effect until the part leaves programming mode. This does not apply to the EESAVE
Fuse which takes effect once it is programmed. Fuses are also latched on power-up.
The device signature imprint table is a dedicated memory area used for storing miscellaneous
device information, such as the device signature and oscillator calibration data. Most of this
memory segment is reserved for internal use, as outlined in
Table 20-6.
Notes:
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Address
0x00
0x01
0x02
0x03
0x04
0x05 ... 0x2A
(3)
(3)
1. See
2. Allows system clock to be output on pin. See
3. The default value gives maximum start-up time for the default clock source. See
4. The default setting selects internal, 8 MHz RC oscillator. See
1. See section “Signature Bytes” for more information.
2. See section “Calibration Bytes” for more information.
(2)
(1)
(4)
(4)
(4)
(4)
page 28
Fuse Low Byte
Contents of Device Signature Imprint Table.
“System Clock Prescaler” on page 31
High Byte
Signature byte 0
Calibration data for internal oscillator at 8.0 MHz
Signature byte 1
Calibration data for internal oscillator at 6.4 MHz
Signature byte 2
Reserved for internal use
for details.
Bit No
7
6
5
4
3
2
1
0
147.
Description
Clock divided by 8
Clock output enabled
Start-up time setting
Start-up time setting
Clock source setting
Clock source setting
Clock source setting
Clock source setting
(1)
(1)
(1)
for details.
“Clock Output Buffer” on page 32
“Reading Lock, Fuse and Signature
Table
(2)
(2)
20-6.
Table 6-6 on page 28
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
(3)
(4)
(4)
(4)
for details.
Table 6-7 on
(3)
(4)
for details.
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