AT90PWM81-16MF Atmel, AT90PWM81-16MF Datasheet - Page 227

• Manufacturer Part Number: AT90PWM81-16MF
• Description: IC MCU AVR 8K FLASH ISP 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16MF

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-MLF®, QFN
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.2
18.3
7734P–AVR–08/10
Operation
Starting a Conversion
Figure 18-1.
The Digital to Analog Converter generates an analog signal proportional to the value of the DAC registers
value.
In order to have an accurate sampling frequency control, there is the possibility to update the DAC input
values through different trigger events.
The DAC is configured thanks to the DACON register. As soon as the DAEN bit in DACON register is
set, the DAC converts the value present on the DACH and DACL registers in accordance with the register
DACON setting.
Alternatively, a conversion can be triggered automatically by various sources. Auto Triggering is enabled
by setting the DAC Auto Trigger Enable bit, DAATE in DACON. The trigger source is selected by setting
the DAC Trigger Select bits, DATS in DACON (See description of the DATS bits for a list of the trigger
sources). When a positive edge occurs on the selected trigger signal, the DAC converts the value present
on the DACH and DACL registers in accordance with the register DACON setting. This provides a
method of starting conversions at fixed intervals. If the trigger signal is still set when the conversion com-
pletes, a new conversion will not be started. If another positive edge occurs on the trigger signal during
conversion, the edge will be ignored. Note that an interrupt flag will be set even if the specific interrupt is
Digital to Analog Converter Block Schematic
Detector
Edge
DAA TE
DAC High bits
VRef
DACH
DATS2
10
DATS1
Update D AC
T rigger
1
DAC
10
0
DATS0
10
DACON
DACL
DAC Lo w bits
-
DALA
Result
DAC
AT90PWM81
DAEN
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