AT90PWM81-16MF Atmel, AT90PWM81-16MF Datasheet - Page 89

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AT90PWM81-16MF

Manufacturer Part Number
AT90PWM81-16MF
Description
IC MCU AVR 8K FLASH ISP 32QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM81-16MF

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
20
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-MLF®, QFN
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number:
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3 118
11.2.1
11.3
7734P–AVR–08/10
Timer/Counter Clock Sources
Reusing the Temporary High Byte Register
The following code examples show how to do an atomic write of the TCNT1 Register contents. Writing
any of the OCR1A/B or ICR1 Registers can be done by using the same principle.
Note:
The assembly code example requires that the r17:r16 register pair contains the value to be written to
TCNT1.
If writing to more than one 16-bit register where the high byte is the same for all registers written, then the
high byte only needs to be written once. However, note that the same rule of atomic operation described
previously also applies in this case.
The Timer/Counter can be clocked by an internal or an external clock source. The clock source is selected
by the Clock Select logic which is controlled by the Clock Select (CS12:0) bits located in the Timer/Coun-
ter control Register B (TCCR1B).
Assembly Code Example
C Code Example
TIM16_WriteTCNT1:
void TIM16_WriteTCNT1( unsigned int i )
{
}
; Save global interrupt flag
in r18,SREG
; Disable interrupts
cli
; Set TCNT1 to r17:r16
out TCNT1H,r17
out TCNT1L,r16
; Restore global interrupt flag
out SREG,r18
ret
unsigned char sreg;
unsigned int i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
_CLI();
/* Set TCNT1 to i */
TCNT1 = i;
/* Restore global interrupt flag */
SREG = sreg;
1. The example code assumes that the part specific header file is included.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS” and
“STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
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AT90PWM81
89

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