PIC18LF25K22-I/SP Microchip Technology, PIC18LF25K22-I/SP Datasheet - Page 21

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PIC18LF25K22-I/SP

Manufacturer Part Number
PIC18LF25K22-I/SP
Description
MCU 8BIT 32KB FLASH 3.6V 28SDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF25K22-I/SP

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
7
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
TABLE 1-2:
TABLE 1-3:
 2010 Microchip Technology Inc.
Legend:
Note 1:
Legend:
PDIP
Note
PDIP,
SOIC
8, 19
Pin Number
2
3
4
5
6
20
2:
TQFP
1: Default pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX, CCP3MX
2: Alternate pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX,
19
20
21
22
23
UQFN
Pin Number
QFN,
5, 16
17
TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
and CCP2MX are set.
CCP3MX and CCP2MX are clear.
QFN
19
20
21
22
23
PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
PIC18(L)F4XK22 PINOUT I/O DESCRIPTIONS
UQFN
17
18
19
20
21
Pin Name
V
V
RA0/C12IN0-/AN0
RA1/C12IN1-/AN1
RA2/C2IN+/AN2/DACOUT/V
RA3/C1IN+/AN3/V
RA4/C1OUT/SRQ/T0CKI
DD
SS
Pin Name
DACOUT
C12IN0-
C12IN1-
C1OUT
C2IN+
C1IN+
T0CKI
V
V
SRQ
RA0
AN0
RA1
AN1
RA2
AN2
RA3
AN3
RA4
REF
REF
+
-
REF
Preliminary
Type
+
Pin
P
P
Type
REF
Pin
Buffer
I/O
I/O
I/O
I/O
I/O
O
O
O
Type
I
I
I
I
I
I
I
I
I
I
I
-
Analog Comparators C1 and C2 inverting input.
Analog Analog input 0.
Analog Comparators C1 and C2 inverting input.
Analog Analog input 1.
Analog Comparator C2 non-inverting input.
Analog Analog input 2.
Analog DAC Reference output.
Analog A/D reference voltage (low) input.
Analog Comparator C1 non-inverting input.
Analog Analog input 3.
Analog A/D reference voltage (high) input.
Buffer
CMOS Comparator C1 output.
Type
TTL
TTL
TTL
TTL
TTL
PIC18(L)F2X/4XK22
Positive supply for logic and I/O pins.
Ground reference for logic and I/O pins.
ST
ST
Digital I/O.
Digital I/O.
Digital I/O.
Digital I/O.
Digital I/O.
SR Latch Q output.
Timer0 external clock input.
Description
Description
DS41412D-page 21

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