PIC18LF25K22-I/SP Microchip Technology, PIC18LF25K22-I/SP Datasheet - Page 347

• Manufacturer Part Number: PIC18LF25K22-I/SP
• Description: MCU 8BIT 32KB FLASH 3.6V 28SDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF25K22-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 19x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: I2C, SPI, EUSART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 7
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 17 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

23.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 23-1:
 2010 Microchip Technology Inc.
HLVDCON
INTCON
IPR2
PIE2
PIR2
TRISA
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are unused by the HLVD module.
Name
Operation During Sleep
VDIRMAG
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIP
OSCFIE
OSCFIF
TRISA7
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
TRISA6
BGVST
Bit 6
C1IP
C1IE
C1IF
TRISA5
IRVST
C2IP
C2IE
Bit 5
C2IF
Preliminary
HLVDEN
TRISA4
INT0IE
EEIP
EEIE
Bit 4
EEIF
TRISA3
BCL1IP
BCL1IE
BCL1IF
23.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
RBIE
Bit 3
PIC18(L)F2X/4XK22
Effects of a Reset
TMR0IF
HLVDIP
HLVDIE
HLVDIF
TRISA2
Bit 2
HLVDL<3:0>
TMR3IP
TMR3IE
TMR3IF
TRISA1
INT0IF
Bit 1
CCP2IP
CCP2IE
CCP2IF
TRISA0
DS41412D-page 347
RBIF
Bit 0
on page
Values
Reset
343
128
124
154
115
119