PIC18LF25K22-I/SP Microchip Technology, PIC18LF25K22-I/SP Datasheet - Page 345

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PIC18LF25K22-I/SP

Manufacturer Part Number
PIC18LF25K22-I/SP
Description
MCU 8BIT 32KB FLASH 3.6V 28SDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF25K22-I/SP

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
7
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
23.2
To set up the HLVD module:
1.
2.
3.
4.
5.
FIGURE 23-2:
 2010 Microchip Technology Inc.
Note:
Select the desired HLVD trip point by writing the
value to the HLVDL<3:0> bits.
Set the VDIRMAG bit to detect high voltage
(VDIRMAG = 1) or low voltage (VDIRMAG = 0).
Enable the HLVD module by setting the
HLVDEN bit.
Clear the HLVD interrupt flag (PIR2<2>), which
may have been set from a previous interrupt.
If interrupts are desired, enable the HLVD
interrupt by setting the HLVDIE and GIE/GIEH
bits (PIE2<2> and INTCON<7>, respectively).
An interrupt will not be generated until the
IRVST bit is set.
CASE 1:
CASE 2:
Enable HLVD
Enable HLVD
HLVD Setup
Before changing any module settings
(V
module (HLVDEN = 0), make the changes
and re-enable the module. This prevents
the generation of false HLVD events.
HLVDIF
HLVDIF
DIRMAG
IRVST
IRVST
V
V
DD
DD
, HLVDL<3:0>), first disable the
LOW-VOLTAGE DETECT OPERATION (VDIRMAG = 0)
Internal Reference is stable
Internal Reference is stable
Preliminary
T
T
IRVST
IRVST
HLVDIF may not be set
HLVDIF cleared in software,
HLVDIF remains set since HLVD condition still exists
23.3
When the module is enabled, the HLVD comparator
and voltage divider are enabled and consume static
current. The total current consumption, when enabled,
is specified in Section 27.0 “Electrical Characteris-
tics”. Depending on the application, the HLVD module
does not need to operate constantly. To reduce current
requirements, the HLVD circuitry may only need to be
enabled for short periods where the voltage is checked.
After such a check, the module could be disabled.
23.4
The internal reference voltage of the HLVD module,
specified
Characteristics”, may be used by other internal
circuitry, such as the programmable Brown-out Reset.
If the HLVD or other circuits using the voltage reference
are disabled to lower the device’s current consumption,
the reference voltage circuit will require time to become
stable before a low or high-voltage condition can be
reliably detected. This start-up time, T
interval that is independent of device clock speed.
The HLVD interrupt flag is not enabled until T
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval (see
Figure
PIC18(L)F2X/4XK22
23-3).
Current Consumption
HLVD Start-up Time
in
HLVDIF cleared in software
Section 27.0
HLVDIF cleared in software
V
V
DS41412D-page 345
HLVD
HLVD
Figure 23-2
IRVST
“Electrical
IRVST
, is an
has
or

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