DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 11

IC DSPIC MCU/DSP 12K 28QFN

DSPIC33FJ12MC202-I/ML

Manufacturer Part Number
DSPIC33FJ12MC202-I/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28QFN EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
FIGURE 3-4:
© 2010 Microchip Technology Inc.
BaseAddress + 0x80
BaseAddress =
No
RemainingCmds = 1368
RemainingCmds =
RemainingCmds – 1
BaseAddress = 0x0
Command to Program
FLOWCHART FOR
PROGRAMMING CODE
MEMORY
RemainingCmds
BaseAddress
PROGP response
Send PROGP
PASS?
Start
‘0’?
End
Is
Is
Yes
Yes
Report Error
No
Failure
3.5.2
After code memory is programmed, the contents of
memory can be verified to ensure that programming
was successful. Verification requires code memory to
be read back and compared against the copy held in
the programmer’s buffer.
The READP command can be used to read back all the
programmed code memory.
Alternatively, you can have the programmer perform
the verification after the entire device is programmed,
using a checksum computation.
3.5.3
Only the Configuration registers are included in the
checksum computation. The Device ID and Unit ID are
not included in the checksum computation.
TABLE D-1: “CHECKSUM COMPUTATION”
how this 16-bit computation can be made for each
dsPIC33F and PIC24H device. Computations for read
code protection are shown both enabled and disabled.
The checksum values shown here assume that the
Configuration registers are also erased. However,
when code protection is enabled, the value of the FGS
register is assumed to be 0x5.
PROGRAMMING VERIFICATION
CHECKSUM COMPUTATION
DS70152H-page 11
shows

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