DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 2

• Manufacturer Part Number: DSPIC33FJ12MC202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit|6-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 2-2:
TABLE 2-1:
DS70152H-page 2
MCLR
V
V
V
PGEC1
PGED1
PGEC2
PGED2
PGEC3
PGED3
Legend: I = Input
Note 1:
DD
SS
CAP
Pin Name
Note 1: These are typical operating voltages. Refer
and AV
and AV
C
EFC
2: It is important for the low-ESR capacitor to
All power supply and ground pins must be connected, including analog supplies (AV
(AV
SS
DD (1)
to
and Timing Requirements”
operating ranges of V
be placed as close as possible to the V
pin.
3.3V
(1)
SS
TABLE 8-1: “AC/DC Characteristics
).
PINS USED DURING PROGRAMMING
Pin Name
CONNECTIONS FOR THE
ON-CHIP REGULATOR
V
V
V
PGEC1
PGED1
PGEC2
PGED2
PGEC3
PGED3
MCLR
DD
CAP
SS
V
V
V
dsPIC33F/PIC24H
CAP
DD
SS
O = Output
DD
and V
Pin Type
CAP
for the full
I/O
I/O
I/O
P
P
P
P
I
I
I
.
P = Power
CAP
Programming Enable
Power Supply
Ground
CPU Logic Filter Capacitor Connection
Primary Programming Pin Pair: Serial Clock
Primary Programming Pin Pair: Serial Data
Secondary Programming Pin Pair: Serial Clock
Secondary Programming Pin Pair: Serial Data
Tertiary Programming Pin Pair: Serial Clock
Tertiary Programming Pin Pair: Serial Data
During Programming
2.2
The program Flash memory on the dsPIC33F/PIC24H
has a specific write/erase requirement that must be
adhered to, for proper device operation. The rule is that
any given word in memory must not be written without
first erasing the page in which it is located. Thus, the
easiest way to conform to this rule is to write all the data
in a programming block within one write cycle. The
programming methods specified in this document
comply with this requirement.
2.3
The pins that are used for programming are listed in
Table
Note:
Note:
2-1.
Program Memory Write/Erase
Requirements
Pins Used During Programming
A
programmed twice before an erase, but
only if (a) the same data is used in both
program operations or (b) bits containing
‘1’ are set to ‘0’ but no ‘0’ is set to ‘1’.
Refer to the specific device data sheet for
complete pin diagrams of the dsPIC33F/
PIC24H devices.
Pin Description
program
© 2010 Microchip Technology Inc.
memory
DD
) and ground
word
can
be