DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 25

• Manufacturer Part Number: DSPIC33FJ12MC202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit|6-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 4-1:
Note:
4.2.4
All commands supported by the programming executive
are described in
through
4.2.5
The SCHECK command instructs the programming
executive to do nothing but generate a response. This
command is used as a “Sanity Check” to verify that the
programming executive is operational.
Expected Response (2 words):
0x1000
0x0002
© 2010 Microchip Technology Inc.
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
15
Opcode
Length
Opcode
Note:
Opcode
Field
Section 4.2.13 “QVER
SCHECK
READC
READP
Reserved
PROGC
PROGP
Reserved
Reserved
Reserved
ERASEP
Reserved
QVER
CRCP
Reserved
QBLANK
One row of code memory consists of (64) 24-bit words. Refer to
COMMAND DESCRIPTIONS
SCHECK COMMAND
This instruction is not required for
programming,
development purposes only.
Mnemonic
12 11
Section 4.2.5 “SCHECK Command”
PROGRAMMING EXECUTIVE COMMAND SET
0x0
0x1
(16-bit words)
but
Description
Length
Command”.
N/A
N/A
N/A
N/A
N/A
N/A
Length
99
1
3
4
4
3
1
5
5
is
provided
Time Out
1 ms/row
700 ms
20 ms
1 ms
1 ms
5 ms
5 ms
1 ms
N/A
N/A
N/A
N/A
N/A
N/A
1s
for
0
Sanity check.
Read an 8-bit word from the specified Configuration register
or Device ID register.
Read ‘N’ 24-bit instruction words of code memory starting
from the specified address.
This command is reserved. It will return a NACK.
Write an 8-bit word to the specified Configuration register.
Program one row of code memory at the specified address,
then verify.
This command is reserved. It will return a NACK.
This command is reserved. It will return a NACK.
This command is reserved. It will return a NACK.
Command to erase a page.
This command is reserved. It will return a NACK.
Query the programming executive software version.
Performs a CRC-16 on the specified range of memory.
This command is reserved. It will return a NACK.
Query to check whether the code memory is blank.
Table 2-2
Description
for device-specific information.
DS70152H-page 25