DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 27

• Manufacturer Part Number: DSPIC33FJ12MC202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit|6-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

4.2.8
The PROGC command instructs the programming
executive to program a single Configuration register,
located at the specified memory address.
After the specified data word has been programmed to
code memory, the programming executive verifies the
programmed data against the data in the command.
Expected Response (2 words):
0x1400
0x0002
© 2010 Microchip Technology Inc.
15
Opcode
Length
Reserved
Addr_MSB
Addr_LS
Data
Opcode
Field
Reserved
12 11
PROGC COMMAND
0x4
0x4
0x0
MSB of 24-bit destination address.
Least Significant 16 bits of 24-bit
destination address.
8-bit data word.
Addr_LS
Data
8 7
Description
Length
Addr_MSB
0
4.2.9
The PROGP command instructs the programming
executive to program one row of code memory
(64 instruction words) to the specified memory
address. Programming begins with the row address
specified in the command. The destination address
should be a multiple of 0x80.
The data to program the memory, located in command
words D_1 through D_96, must be arranged using the
packed instruction word format illustrated in
After all data has been programmed to code memory,
the programming executive verifies the programmed
data against the data in the command.
Expected Response (2 words):
0x1500
0x0002
15
Opcode
Length
Reserved
Addr_MSB
Addr_LS
D_1
D_2
...
D_96
Note:
Opcode
Field
Reserved
12 11
PROGP COMMAND
Refer to
information.
0x5
0x63
0x0
MSB of 24-bit destination address.
Least Significant 16 bits of 24-bit
destination address.
16-bit data word 1.
16-bit data word 2.
16-bit data word 3 through 95.
16-bit data word 96.
Table 2-2
Addr_LS
D_N
D_1
D_2
8 7
...
Description
Length
for code memory size
Addr_MSB
DS70152H-page 27
Figure
4-4.
0