DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 64

• Manufacturer Part Number: DSPIC33FJ12MC202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit|6-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE C-2:
DS70152H-page 64
Step 1: Initialize TBLPAG and NVMCON to write stored diagnostic and Calibration Words.
Step 2: Write stored diagnostic and Calibration Words.
Step 3: Repeat step 2: thirty-two times.
Step 4: Initiate the write cycle.
Step 5: Wait for Row Program operation to complete and make sure WR bit is clear.
Command (Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
—
—
RESTORE DIAGNOSTIC AND CALIBRATION REGISTERS
Data (Hex)
24001A
883B0A
200800
880190
207807
208006
000000
BB0BB6
000000
000000
BBDBB6
000000
000000
BBEBB6
000000
000000
BB1BB6
000000
000000
ABE761
000000
000000
000000
000000
803B00
883C20
000000
<VISI>
040200
000000
—
—
MOV
MOV
MOV
MOV
MOV
MOV
NOP
TBLWTL[W6++],
NOP
NOP
TBLWTH.B[W6++],
NOP
NOP
TBLWTH.B[W6++],
NOP
NOP
TBLWTL[W6++],
NOP
NOP
BSET
NOP
NOP
NOP
NOP
Externally time ‘P13’ msec (see
Characteristics and Timing
for the Row Program operation to complete.
MOV
MOV
NOP
Clock out contents of VISI register
GOTO
NOP
Repeat until the WR bit is clear
#0x4001,
W10,
#0x80,
W0,
#0x780,
#0x800,
NVMCON,
W0,
0x200
NVMCON,
W0
VISI
W10
NVMCON
W0
TBLPAG
W7
W6
[W7]
[W7++]
[++W7]
[W7++]
#WR
Description
Requirements”) to allow sufficient time
Section 8.0 “AC/DC
© 2010 Microchip Technology Inc.