ATMEGA644A-PU Atmel, ATMEGA644A-PU Datasheet - Page 32

IC MCU AVR 64K FLASH 40PDIP

ATMEGA644A-PU

Manufacturer Part Number
ATMEGA644A-PU
Description
IC MCU AVR 64K FLASH 40PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA644A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG, TWI, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.2.3
8272A–AVR–01/10
Clock Source Connections
selectable delays are shown in
dependent as shown in
Table 8-2.
Main purpose of the delay is to keep the AVR in reset until it is supplied with minimum Vcc. The
delay will not monitor the actual voltage and it will be required to select a delay longer than the
Vcc rise time. If this is not possible, an internal or external Brown-Out Detection circuit should be
used. A BOD circuit will ensure sufficient Vcc before it releases the reset, and the time-out delay
can be disabled. Disabling the time-out delay without utilizing a Brown-Out Detection circuit is
not recommended.
The oscillator is required to oscillate for a minimum number of cycles before the clock is consid-
ered stable. An internal ripple counter monitors the oscillator output clock, and keeps the internal
reset active for a given number of clock cycles. The reset is then released and the device will
start to execute. The recommended oscillator start-up time is dependent on the clock type, and
varies from 6 cycles for an externally applied clock to 32K cycles for a low frequency crystal.
The start-up sequence for the clock includes both the time-out delay and the start-up time when
the device starts up from reset. When starting up from Power-save or Power-down mode, Vcc is
assumed to be at a sufficient level and only the start-up time is included.
The pins XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which
can be configured for use as an On-chip Oscillator, as shown in
quartz crystal or a ceramic resonator may be used.
C1 and C2 should always be equal for both crystals and resonators. The optimal value of the
capacitors depends on the crystal or resonator in use, the amount of stray capacitance, and the
electromagnetic noise of the environment. For ceramic resonators, the capacitor values given by
the manufacturer should be used.
Figure 8-2.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Typ Time-out (V
4.1 ms
65 ms
0 ms
Number of Watchdog Oscillator Cycles
Crystal Oscillator Connections
CC
= 5.0V)
”Typical Characteristics” on page
Table
C2
C1
Typ Time-out (V
8-2. The frequency of the Watchdog Oscillator is voltage
4.3 ms
69 ms
0 ms
CC
= 3.0V)
342.
XTAL2
XTAL1
GND
Figure 8-2 on page
Number of Cycles
8K (8,192)
512
0
32. Either a
32

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