S912XEP100J5MAG Freescale Semiconductor, S912XEP100J5MAG Datasheet - Page 637

no-image

S912XEP100J5MAG

Manufacturer Part Number
S912XEP100J5MAG
Description
MCU 64K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S912XEP100J5MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEP100J5MAG
Manufacturer:
FREESCALE
Quantity:
962
Part Number:
S912XEP100J5MAG
Manufacturer:
FREESCALE
Quantity:
2 400
Part Number:
S912XEP100J5MAG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S912XEP100J5MAG
Manufacturer:
FREESCALE
Quantity:
2 400
Part Number:
S912XEP100J5MAG
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
S912XEP100J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
Module Base + 0x00X2
Module Base + 0x00X3
ID[14:7]
ID[6:0]
Field
Field
RTR
7-0
7-1
0
Reset:
Reset:
W
W
R
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Remote Transmission Request — This flag reflects the status of the remote transmission request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID14
ID6
7
x
Figure 16-28. Identifier Register 2 (IDR2) — Extended Identifier Mapping
7
x
Figure 16-29. Identifier Register 3 (IDR3) — Extended Identifier Mapping
Table 16-29. IDR2 Register Field Descriptions — Extended
Table 16-30. IDR3 Register Field Descriptions — Extended
ID13
ID5
6
x
6
x
MC9S12XE-Family Reference Manual Rev. 1.23
ID12
ID4
5
x
5
x
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
ID11
ID3
4
x
4
x
Description
Description
ID10
ID2
x
x
3
3
ID9
ID1
2
x
2
x
ID8
ID0
x
x
1
1
RTR
ID7
0
x
0
x
637

Related parts for S912XEP100J5MAG