MCIMX355AJQ5CR2 Freescale Semiconductor, MCIMX355AJQ5CR2 Datasheet - Page 106

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MCIMX355AJQ5CR2

Manufacturer Part Number
MCIMX355AJQ5CR2
Description
MULTIMEDIA PROCESSOR 400-MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX35r
Datasheet

Specifications of MCIMX355AJQ5CR2

Core Processor
ARM11
Core Size
32-Bit
Speed
532MHz
Connectivity
1-Wire, CAN, EBI/EMI, Ethernet, I²C, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
400-MAPBGA
Processor Series
i.MX355
Core
ARM1136JF-S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX355AJQ5CR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
4.9.17.5
Figure 80
host terminates transfer,
Table 69
106
Parameter
tn, tj
ATA
lists the timing parameters for the UDMA-in burst.
shows timing when the UDMA-in transfer starts,
UDMA-In Timing
Parameter
Figure
Figure 79
from
tkjn
ton
toff
Table 68. MDMA Read and Write Timing Parameters (continued)
Figure 81. UDMA-In Host Terminates Transfer Timing Diagram
78,
i.MX35 Applications Processors for Automotive Products, Rev. 9
Figure 82
Figure 80. UDMA-In Transfer Starts Timing Diagram
tn = tj = tkjn = (max.(time_k,. time_jn) × T – (tskew1 + tskew2 + tskew6)
ton = time_on × T – tskew1
toff = time_off × T – tskew1
shows timing when the UDMA-in device terminates transfer, and
Value
Figure 81
shows timing when the UDMA-in
Freescale Semiconductor
Controlling
Variable
time_jn

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