HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 653

IC SUPERH MPU ROMLESS 240BGA

HD6417727BP100BV

Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP100BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
4. When modem control is enabled, transmission can be stopped and restarted in accordance with
the CTS2 input value. When CTS2 is set to 1, if transmission is in progress, the line goes to
the mark state after transmission of one frame. When CTS2 is set to 0, the next transmit data
is output starting from the start bit.
Figure 19.7 shows an example of the operation when modem control is used.
TXI interrupt
Serial
CTS2
TEND
TxD2
TDFE
Serial
data
request
data
1
Figure 19.7 Example of Operation Using Modem Control (CTS2)
Start
Start
SCFTDR2 and TDFE
bit
0
bit
cleared to 0 by TXI
0
flag read as 1 then
interrupt handler
Data written to
D
(Example with 8-Bit Data, Parity, One Stop Bit)
D
Figure 19.6 Example of Transmit Operation
0
0
D
D
1
One frame
1
Data
before a stop bit
Rise this point
D
Section 19 Serial Communication Interface with FIFO (SCIF)
D
7
7
TXI interrupt
Parity
Parity
bit
request
bit
0/1
0/1
Stop
Stop
bit
bit
1
Start
bit
0
Rev.6.00 Mar. 27, 2009 Page 595 of 1036
D
0
D
Start
1
bit
0
Data
D
D
0
7
Parity
D
bit
0/1
1
REJ09B0254-0600
Stop
(mark state)
bit
1
D
7
state
0/1
Idle
1

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