HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 654

• Manufacturer Part Number: HD6417727BP100BV
• Description: IC SUPERH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP100BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 19 Serial Communication Interface with FIFO (SCIF)
•
Figures 19.8 and 19.9 show sample serial reception flowcharts. After SCIF reception is enabled,
use the following procedure to perform serial data reception.
Rev.6.00 Mar. 27, 2009 Page 596 of 1036
REJ09B0254-0600
Serial data reception
No
No
Read receive data in SCFRDR2,
Clear RE bit in SCSCR2 to 0
Read RDF flag in SCSSR2
and clear RDF flag in
BRK v ER v DR = 1?
Read DR, ER, BRK
All data received?
flags in SCSSR2
Start reception
End reception
SCSSR2 to 0
RDF = 1?
Figure 19.8 Sample Serial Reception Flowchart (1)
No
Yes
Yes
Error processing
Yes
(1)
(2)
(3)
(1) Receive error handling and break
(2) SCIF status check and receive data
(3) Serial reception continuation
detection:
Read the DR, ER, and BRK flags in
SCSSR2 to identify any error, perform
the appropriate error handling, then
clear the DR, ER, and BRK flags to 0.
In the case of a framing error, a break
can also be detected by reading the
value of the RxD2 pin.
read :
Read the serial status register 2
(SCSSR2) and check that RDF = 1,
then read the receive data in the
receive FIFO data register 2
(SCFRDR2), read 1 from the RDF flag,
and then clear the RDF flag to 0. The
transition of the RDF flag from 0 to 1
can be identified by an RXI interrupt.
procedure:
To continue serial reception, read at
least the receive trigger set number of
receive data bytes from SCFRDR2,
read 1 from the RDF flag, then clear the
RDF flag to 0. The number of receive
data bytes in SCFRDR2 can be
ascertained by reading the lower bits of
SCFDR2.