HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 906

• Manufacturer Part Number: HD6417727BP100BV
• Description: IC SUPERH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP100BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 27 I/O Ports
27.4
Each pin has an input pullup MOS, which is controlled by Port D Control Register (PDCR) in
PFC.
27.4.1
Note: * Undefined
Port D Data Register (PDDR) is a 6-bit read/write and 2-bit read register that stores data for pins
PTD7 to PTD0. PD7DT to PD0DT bit corresponds to PTD7 to PTD0 pin. When the pin function
is general output port, if the port is read, the value of the corresponding PDDR bit is returned
directly. When the function is general input port, if the port is read, the corresponding pin level is
read. Table 27.3 shows the function of PDDR.
PDDR is initialized to B'0*0*0000 by a power-on reset. After initialization, the general input port
function (pullup MOS: on) is set as the initial pin function, and the corresponding pin levels are
fetched. It retains its previous value in standby mode and sleep mode, and by a manual reset.
Rev.6.00 Mar. 27, 2009 Page 848 of 1036
REJ09B0254-0600
Initial value:
Port D
Port D Data Register (PDDR)
R/W:
Bit:
PD7DT
R/W
7
0
PD6DT
R
6
*
PD5DT
R/W
5
0
PD4DT
R
4
*
PD3DT
R/W
3
0
PD2DT
R/W
2
0
PD1DT
R/W
1
0
PD0DT
R/W
0
0