HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 171

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 3.25 Variation of Fixed-Point Multiply Operation
Table 3.26 Correspondence between Operands and Registers
Note: The multiply operations basically generate 32-bit operation results. So when a register
The multiply operation of the DSP unit side is not integer but fixed-point arithmetic. So, the upper
words of each multiplier and multiplicand are input into a MAC unit as shown in figure 3.16. In
the SH's standard multiply operations, the lower words of both source operands are input into a
MAC unit. The operation result is also different from the SH's case. The SH's multiply operation
Mnemonic
PMULS
Register
A0
A1
M0
M1
X0
X1
Y0
Y1
providing the guard-bit parts are specified as a destination operand, the guard-bit parts will
copy bit 31 of the operation result.
39
Function
Signed multiplication
Se
Yes
Yes
Yes
Yes
Figure 3.16 Fixed-Point Multiply Operation Flow
31
S
0
Source 1
39
31
S
MAC
Destination
0
Sf
Yes
Yes
Yes
Yes
Source 1
Se
39
1 0
31
0
S
Source 2
Rev. 1.00 Dec. 27, 2005 Page 127 of 1044
Source 2
Sf
Section 3 DSP Operating Unit
Ignored
Dg
Yes
Yes
Yes
Yes
0
REJ09B0269-0100
Destination
Dg

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