HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 379

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Name
WE3(BE3)/ICIOWR O
WE2(BE2)/ICIORD
WE1(BE1)/WE
WE0(BE0)
RAS
CAS
CKE
IOIS16
DQMUU
DQMUL
DQMLU
DQMLL
WAIT
BREQ
BACK
MD5 to MD3
REFOUT
I/O Function
O
O
O
O
O
O
I
O
I
I
O
I
O
Indicates that D31 to D24 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Functions as the I/O write strobe signal when the PCMCIA is used.
Indicates that D23 to D16 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Functions as the I/O read strobe signal when the PCMCIA is used.
Indicates that D15 to D8 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Functions as the memory write strobe signal when the PCMCIA is
used.
Indicates that D7 to D0 are being written to.
Connected to the byte select signal when a byte-selection SRAM is
connected.
Connects to RAS pin when SDRAM is connected.
Connects to CAS pin when SDRAM is connected.
Connects to CKE pin when SDRAM is connected.
PCMCIA 16-bit I/O signal
Valid only in little endian mode.
Make it into low level at the time of big endian mode.
Connected to the DQMxx when the SDRAM is connected.
DQMUU: Selects D31 to D24
DQMUL: Selects D23 to D16
DQMLU: Selects D15 to D8
DQMLL: Selects D7 to D0
External wait input
Bus request input
Bus acknowledge output
MD5: Selects data alignment (big endian or little endian)
MD4 and MD3: Specify area 0 bus width (8/16/32 bits)
Refresh request output when a bus is released
Rev. 1.00 Dec. 27, 2005 Page 335 of 932
Section 12 Bus State Controller (BSC)
REJ09B0269-0100

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