UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 214

• Manufacturer Part Number: UPD78F0513AGB-GAF-AX
• Description: MCU 8BIT 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGB-GAF-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Symbol
P12
P13
P14
P0
P1
P2
P3
P4
P5
P6
P7
Note
Pmn
0
1
P17
P27
P47
P57
P67
P77
7
0
0
0
0
0
“0” is always read from the output latch of P121 to P124 if the pin is in the external clock input mode.
Output 0
Output 1
P06
P16
P26
P46
P56
P66
P76
0
6
0
0
0
Output data control (in output mode)
P145
P05
P15
P25
P45
P55
P65
P75
5
0
0
0
Figure 5-38. Format of Port Register (78K0/KF2)
P124
P144
P04
P14
P24
P44
P54
P64
P74
4
0
0
Note
P123
P143
P03
P13
P23
P33
P43
P53
P63
P73
3
0
Note
m = 0 to 7, 12 to 14; n = 0 to 7
P122
P142
P02
P12
P22
P32
P42
P52
P62
P72
2
0
Note
P121
P141
P21
Input low level
Input high level
P01
P11
P31
P41
P51
P61
P71
1
0
Note
P120
P130
P140
P00
P10
P20
P30
P40
P50
P60
P70
Input data read (in input mode)
0
CHAPTER 5 PORT FUNCTIONS
Address
FF0CH
FF0DH
FF0EH
FF00H
FF01H
FF02H
FF03H
FF04H
FF05H
FF06H
FF07H
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
After reset
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
214