UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 221

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UPD78F0513AGB-GAF-AX

Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0513AGB-GAF-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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78K0/Kx2
5.4 Port Function Operations
5.4.1 Writing to I/O port
(1) Output mode
(2) Input mode
5.4.2 Reading from I/O port
(1) Output mode
(2) Input mode
5.4.3 Operations on I/O port
(1) Output mode
(2) Input mode
5.5 Settings of Port Mode Register and Output Latch When Using Alternate Function
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Port operations differ depending on whether the input or output mode is set, as shown below.
To use the alternate function of a port pin, set the port mode register and output latch as shown in Table 5-6.
Remark The port pins mounted depend on the product. See Table 5-3. Port Functions.
A value is written to the output latch by a transfer instruction, and the output latch contents are output from the pin.
Once data is written to the output latch, it is retained until data is written to the output latch again.
The data of the output latch is cleared when a reset signal is generated.
A value is written to the output latch by a transfer instruction, but since the output buffer is off, the pin status does not
change.
Once data is written to the output latch, it is retained until data is written to the output latch again.
The data of the output latch is cleared when a reset signal is generated.
The output latch contents are read by a transfer instruction. The output latch contents do not change.
The pin status is read by a transfer instruction. The output latch contents do not change.
An operation is performed on the output latch contents, and the result is written to the output latch. The output latch
contents are output from the pins.
Once data is written to the output latch, it is retained until data is written to the output latch again.
The data of the output latch is cleared when a reset signal is generated.
The pin level is read and an operation is performed on its contents. The result of the operation is written to the output
latch, but since the output buffer is off, the pin status does not change.
The data of the output latch is cleared when a reset signal is generated.
CHAPTER 5 PORT FUNCTIONS
221

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