UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 454

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UPD78F0513AGB-GAF-AX

Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0513AGB-GAF-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
UPD78F0513AGB-GAF-AX
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78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Remark LIN stands for Local Interconnect Network and is a low-speed (1 to 20 kbps) serial communication protocol
Notes 1.
Remark The interval between each field is controlled by software.
INTST6
Figures 15-1 and 15-2 outline the transmission and reception operations of LIN.
LIN Bus
(output)
2.
3.
Note 3
TX6
intended to aid the cost reduction of an automotive network.
LIN communication is single-master communication, and up to 15 slaves can be connected to one master.
The LIN slaves are used to control the switches, actuators, and sensors, and these are connected to the LIN
master via the LIN network.
Normally, the LIN master is connected to a network such as CAN (Controller Area Network).
In addition, the LIN bus uses a single-wire method and is connected to the nodes via a transceiver that
complies with ISO9141.
In the LIN protocol, the master transmits a frame with baud rate information and the slave receives it and
corrects the baud rate error. Therefore, communication is possible when the baud rate error in the slave is
±15% or less.
The wakeup signal frame is substituted by 80H transmission in the 8-bit mode.
The sync break field is output by hardware. The output width is the bit length set by bits 4 to 2 (SBL62 to
SBL60) of asynchronous serial interface control register 6 (ASICL6) (see 15.4.2 (2) (h)
transmission).
INTST6 is output on completion of each transmission. It is also output when SBF is transmitted.
signal frame
8 bits
Wakeup
Note 1
Figure 15-1. LIN Transmission Operation
13-bit
transmission
break field
Sync
Note 2
SBF
transmission
Sync field
55H
CHAPTER 15 SERIAL INTERFACE UART6
transmission
Identifier
Data
field
transmission
Data field
Data
transmission
Data field Checksum
Data
transmission
field
Data
SBF
454

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