UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 756

• Manufacturer Part Number: UPD78F0513AGB-GAF-AX
• Description: MCU 8BIT 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGB-GAF-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
28.1 Connecting QB-MINI2 to
OCD1B/P32), and V
OCD0A/X1 and OCD1A/P31, or OCD0B/X2 and OCD1B/P32 are used can be selected.
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The
Caution The
Remark
Notes 1. This connection is designed assuming that the reset signal is output from the N-ch open-drain buffer (output
Cautions 1. Input the clock from the OCD0A/X1 pin during on-chip debugging.
μ
PD78F05xxD and 78F05xxDA use the V
2. Make pull-down resistor 470 Ω or more (10 kΩ: recommended).
CHAPTER 28 ON-CHIP DEBUG FUNCTION (
2. Control the OCD0A/X1 and OCD0B/X2 pins by externally pulling down the OCD1A/P31 pin or by
development and evaluation. Do not use the on-chip debug function in products designated for
mass production, because the guaranteed number of rewritable times of the flash memory may be
exceeded when this function is used, and product reliability therefore cannot be guaranteed.
Renesas Electronics is not liable for problems occurring when the on-chip debug function is used.
μ
μ
resistance: 100 Ω or less). For details, refer to QB-MINI2 User’s Manual (U18371E).
PD78F05xxD:
PD78F05xxDA:
using an external circuit using the P130 pin (that outputs a low level when the device is reset).
Figure 28-1. Connection Example of QB-MINI2 and
μ
Target connector
(10-pin)
SS
PD78F05xxD and 78F05xxDA have an on-chip debug function, which is provided for
RESET_IN
RESET_OUT
pins to communicate with the host machine via an on-chip debug emulator (QB-MINI2). Whether
FLMD0
R.F.U.
R.F.U.
DATA
GND
GND
CLK
V
Note 1
μ
μ
DD
PD78F0503D, 78F0513D, 78F0515D, 78F0527D, 78F0537D, 78F0547D
PD78F0503DA, 78F0513DA, 78F0515DA, 78F0527DA, 78F0537DA, 78F0547DA
μ
(Open)
(Open)
PD78F05xxD and 78F05xxDA
(When OCD0A/X1 and OCD0B/X2 Are Used)
V
DD
(Recommended)
10 k
DD
, FLMD0, RESET, OCD0A/X1 (or OCD1A/P31), OCD0B/X2 (or
Note 2
Note 2
V
DD
μ
1 k
(Recommended)
PD78F05xxD and 78F05xxDA ONLY)
CHAPTER 28 ON-CHIP DEBUG FUNCTION
μ
PD78F05xxD and 78F05xxDA
V
DD
Reset circuit
Reset signal
X2/OCD0B
P31
GND
Target device
RESET
V
X1/OCD0A
FLMD0
DD
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