UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 244

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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(1) 16-bit counter
(2) CCR0 buffer register
Remark
/2
/4
/8
/16
/32
/64
/128
This 16-bit counter can count internal clocks or external events.
The count value of this counter can be read by using the TQnCNT register.
When the TQnCTL0.TQnCE bit = 0, the value of the 16-bit counter is FFFFH. If the TQnCNT register is read at
this time, 0000H is read.
The TQnCE bit is cleared to 0 after reset.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TQnCCR0 register is used as a compare register, the value written to the TQnCCR0 register is
transferred to the CCR0 buffer register. When the count value of the 16-bit counter matches the value of the
CCR0 buffer register, a compare match interrupt request signal (INTTQnCC0) is generated.
The CCR0 buffer register cannot be read or written directly.
The TQnCCR0 register is cleared to 0000H after reset, and the CCR0 buffer register is cleared to 0000H.
f
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: Peripheral clock
register
TQ1CCR0
CCR0
buffer
TQ1CNT
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Figure 7-3. TMQ1 Block Diagram
register
CCR1
TQ1CCR1
buffer
User’s Manual U17716EJ2V0UD
16-bit counter
Internal bus
Internal bus
register
CCR2
TQ1CCR2
buffer
register
TQ1CCR3
CCR3
buffer
Clear
INTTQ1OV
INTTQ1CC0
INTTQ1CC1
INTTQ1CC2
INTTQ1CC3
TOQ10