UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 385

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
(2) PWM output of 0%/100%
<1> 0% output is selected by the valley interrupt (without a match with the 16-bit counter).
<2> 0% output is canceled by the crest interrupt (without a match with the 16-bit counter).
<3> 0% output is selected by the crest interrupt (with a match with the 16-bit counter).
<4> 0% output is canceled by the valley interrupt (without a match with the 16-bit counter).
Remark
The V850ES/IE2 is capable of 0% wave output and 100% wave output for PWM output.
A low level is continuously output from TOQ1Tm pin as the 0% wave output. A high level is continuously output
from TOQ1Tm pin as the 100% wave output.
The 0% wave is output by setting the TQ1CCRm register to “M + 1” when the TQ1CCR0 register = M.
The 100% wave is output by setting the TQ1CCRm register to “0000H”.
Rewriting the TQ1CCRm register is enabled while the timer is operating, and 0% wave output or 100% wave
output can be selected at the point of the crest interrupt (INTTQ1CC0) and valley interrupt (INTTQ1OV).
Remark
The valley interrupt forcibly lowers the timer output. This produces the 0% output.
The crest interrupt forcibly raises the timer output. This cancels the 0% output.
The crest interrupt forcibly raises the timer output, but lowering the timer output takes precedence when
the value of the TQ1CCRm register matches the value of the 16-bit counter. As a result, the 0% wave is
output.
The valley interrupt forcibly lowers the timer output. This cancels the 0% output.
of timer output
buffer register
Forced timing
TQ1CCR1
TQ1CCR0
pin output
pin output
TOQ1T1
TOQ1B1
means forced raising and means forced lowering.
register
register
counter
CCR1
m = 1 to 3
16-bit
0000H
Figure 9-9. 0% PWM Output Waveform (with Dead Time)
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CHAPTER 9 MOTOR CONTROL FUNCTION
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<1>
User’s Manual U17716EJ2V0UD
0% output
M + 1
M + 1
M
<2>
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<3>
M + 1
M + 1
0% output
<4>
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