UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 461

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UPD70F3714GC-8BS-A

Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3714GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(2) 4-buffer mode operation (4 buffers of continuous select/one-shot select by timer trigger)
Remark
(1) The ADA0CE bit = 1 (enable)
(2) The A/D conversion start trigger signal from the timer
(3) The ANI02 pin is A/D converted
(4) The conversion result is stored in the ADA0CR0 register (12) The INTAD0 interrupt request signal is generated
(5) The ANI02 pin is A/D converted
(6) The conversion result is stored in the ADA0CR1 register (14) To end the conversion, the ADA0CE bit = 0 (stop)
(7) The ANI02 pin is A/D converted
A/D conversion start
trigger signal from timer
(motor control function)
In this mode, the voltage of one analog input pin (ANInm) is A/D converted four times using the A/D conversion
start trigger signal from the timer (motor control function) as a trigger, and the results are stored in the
ADAnCRm register.
The A/Dn conversion end interrupt request signal (INTADn) is generated when the four A/D conversions end.
After the end of A/D conversion, the A/D converter waits for a trigger.
This mode is suitable for applications in which the average of the A/D conversion results is calculated.
Remark
(motor control function) is generated
Analog Input Pin
ANInm
ANInm
ANInm
ANInm
This is an operation example with the following setting.
ADA0M0.ADA0MD1 and ADA0M0.ADA0MD0 bits = 00 or 10, ADA0M0.ADA0TMD bit = 1,
ADA0M2.ADA0BS bit = 1, ADA0M2.ADA0TMD1 bit = 1,
ADA0S.ADA0S1 and ADA0S.ADA0S0 bits = 10
n = 0, 1
m = 0 to 3
(4 Buffers of Continuous Select/One-Shot Select by Timer Trigger)
ADAnCR0
ADAnCR1
ADAnCR2
ADAnCR3
A/D Conversion Result Register
Figure 11-17. Example of 4-Buffer Mode Operation
CHAPTER 11 A/D CONVERTERS 0 AND 1
ANI00
ANI01
ANI02
ANI03
User’s Manual U17716EJ2V0UD
(×4)
(8) The conversion result is stored in the ADA0CR2 register
(9) The ANI02 pin is A/D converted
(10) The conversion result is stored in the ADA0CR3 register
(11) The ADA0M0.ADA0EF bit = 0
(13) If next trigger is input, return to (3)
A/D converter 0
ADA0CR0
ADA0CR1
ADA0CR2
ADA0CR3
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