PIC16LC65-04I/L Microchip Technology, PIC16LC65-04I/L Datasheet - Page 51

IC MIC CTL 4K LP OTP IT 44PLCC

PIC16LC65-04I/L

Manufacturer Part Number
PIC16LC65-04I/L
Description
IC MIC CTL 4K LP OTP IT 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16LC65-04I/L

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Data Converters
-
5.0
Some pins for these I/O ports are multiplexed with an
alternate function(s) for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
5.1
All devices have a 6-bit wide PORTA, except for the
PIC16C61 which has a 5-bit wide PORTA.
Pin RA4/T0CKI is a Schmitt Trigger input and an open
drain output. All other RA port pins have TTL input lev-
els and full CMOS output drivers. All pins have data
direction bits (TRIS registers) which can configure
these pins as output or input.
Setting a bit in the TRISA register puts the correspond-
ing output driver in a hi-impedance mode. Clearing a bit
in the TRISA register puts the contents of the output
latch on the selected pin.
Reading PORTA register reads the status of the pins
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. There-
fore, a write to a port implies that the port pins are read,
this value is modified, and then written to the port data
latch.
Pin RA4 is multiplexed with Timer0 module clock input
to become the RA4/T0CKI pin.
EXAMPLE 5-1:
BCF
BCF
CLRF
BSF
MOVLW
MOVWF
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
1997 Microchip Technology Inc.
STATUS, RP0
STATUS, RP1
PORTA
STATUS, RP0
0xCF
TRISA
I/O PORTS
PORTA and TRISA Register
INITIALIZING PORTA
;
; PIC16C66/67 only
; Initialize PORTA by
; clearing output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<5:4> as outputs
; TRISA<7:6> are always
; read as '0'.
FIGURE 5-1:
FIGURE 5-2:
Data
bus
WR
Port
WR
TRIS
RD PORT
Note 1: I/O pins have protection diodes to V
Data
bus
WR
TRIS
WR
PORT
RD PORT
Note 1: I/O pin has protection diodes to V
TMR0 clock input
2: The PIC16C61 does not have an RA5 pin.
V
D
D
Data Latch
TRIS Latch
SS
CK
CK
TRIS Latch
.
Data Latch
D
D
CK
CK
RD TRIS
BLOCK DIAGRAM OF THE
RA3:RA0 PINS AND THE RA5
PIN
BLOCK DIAGRAM OF THE
RA4/T0CKI PIN
Q
Q
Q
Q
RD TRIS
Q
Q
Q
Q
Q
PIC16C6X
Q
EN
Schmitt
Trigger
input
buffer
EN
EN
D
DS30234D-page 51
D
TTL
input
buffer
V
N
SS
V
V
P
N
SS
DD
SS
DD
I/O pin
only.
and
I/O pin
(1)
(1)

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